blob: bfb3082ba0ac5fd531be80afae6269d8b91f43c5 [file] [log] [blame]
developereee29802016-05-11 18:45:20 +08001/*
2 * Copyright (c) 2016, ARM Limited and Contributors. All rights reserved.
3 *
dp-armfa3cf0b2017-05-03 09:38:09 +01004 * SPDX-License-Identifier: BSD-3-Clause
developereee29802016-05-11 18:45:20 +08005 */
Antonio Nino Diaze0f90632018-12-14 00:18:21 +00006
7#include <assert.h>
8
developereee29802016-05-11 18:45:20 +08009#include <arch.h>
10#include <arch_helpers.h>
Antonio Nino Diaze0f90632018-12-14 00:18:21 +000011#include <common/debug.h>
12#include <drivers/delay_timer.h>
13#include <lib/mmio.h>
14
developereee29802016-05-11 18:45:20 +080015#include <mt8173_def.h>
16#include <mtk_sip_svc.h>
17
18#define crypt_read32(offset) \
19 mmio_read_32((uintptr_t)(CRYPT_BASE+((offset) * 4)))
20
21#define crypt_write32(offset, value) \
22 mmio_write_32((uintptr_t)(CRYPT_BASE + ((offset) * 4)), (uint32_t)value)
23
24#define GET_L32(x) ((uint32_t)(x & 0xffffffff))
25#define GET_H32(x) ((uint32_t)((x >> 32) & 0xffffffff))
26
27#define REG_INIT 0
28#define REG_MSC 4
29#define REG_TRIG 256
30#define REG_STAT 512
31#define REG_CLR 513
32#define REG_INT 514
33#define REG_P68 768
34#define REG_P69 769
35#define REG_P70 770
36#define REG_P71 771
37#define REG_P72 772
38#define REG_D20 820
39#define KEY_SIZE 160
40#define KEY_LEN 40
41
42/* Wait until crypt is completed */
43uint64_t crypt_wait(void)
44{
45 crypt_write32(REG_TRIG, 0);
46 while (crypt_read32(REG_STAT) == 0)
47 ;
48 udelay(100);
49 crypt_write32(REG_CLR, crypt_read32(REG_STAT));
50 crypt_write32(REG_INT, 0);
51 return MTK_SIP_E_SUCCESS;
52}
53
54static uint32_t record[4];
55/* Copy encrypted key to crypt engine */
56uint64_t crypt_set_hdcp_key_ex(uint64_t x1, uint64_t x2, uint64_t x3)
57{
58 uint32_t i = (uint32_t)x1;
59 uint32_t j = 0;
60
61 if (i > KEY_LEN)
62 return MTK_SIP_E_INVALID_PARAM;
63
64 if (i < KEY_LEN) {
65 crypt_write32(REG_MSC, 0x80ff3800);
66 crypt_write32(REG_INIT, 0);
67 crypt_write32(REG_INIT, 0xF);
68 crypt_write32(REG_CLR, 1);
69 crypt_write32(REG_INT, 0);
70
71 crypt_write32(REG_P68, 0x70);
72 crypt_write32(REG_P69, 0x1C0);
73 crypt_write32(REG_P70, 0x30);
74 crypt_write32(REG_P71, 0x4);
75 crypt_wait();
76
77 crypt_write32(REG_D20 + 4 * i, GET_L32(x2));
78 crypt_write32(REG_D20 + 4 * i + 1, GET_H32(x2));
79 crypt_write32(REG_D20 + 4 * i + 2, GET_L32(x3));
80 crypt_write32(REG_D20 + 4 * i + 3, GET_H32(x3));
81
82 crypt_write32(REG_P69, 0);
83 crypt_write32(REG_P68, 0x20);
84 crypt_write32(REG_P71, 0x34 + 4 * i);
85 crypt_write32(REG_P72, 0x34 + 4 * i);
86 crypt_wait();
87
88 for (j = 0; j < 4; j++) {
89 crypt_write32(REG_P68, 0x71);
90 crypt_write32(REG_P69, 0x34 + 4 * i + j);
91 crypt_write32(REG_P70, record[j]);
92 crypt_wait();
93 }
94 }
95 /* Prepare data for next iteration */
96 record[0] = GET_L32(x2);
97 record[1] = GET_H32(x2);
98 record[2] = GET_L32(x3);
99 record[3] = GET_H32(x3);
100 return MTK_SIP_E_SUCCESS;
101}
102
103/* Set key to hdcp */
104uint64_t crypt_set_hdcp_key_num(uint32_t num)
105{
106 if (num > KEY_LEN)
107 return MTK_SIP_E_INVALID_PARAM;
108
109 crypt_write32(REG_P68, 0x6A);
110 crypt_write32(REG_P69, 0x34 + 4 * num);
111 crypt_wait();
112 return MTK_SIP_E_SUCCESS;
113}
114
115/* Clear key in crypt engine */
116uint64_t crypt_clear_hdcp_key(void)
117{
118 uint32_t i;
119
120 for (i = 0; i < KEY_SIZE; i++)
121 crypt_write32(REG_D20 + i, 0);
122 return MTK_SIP_E_SUCCESS;
123}