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Pankaj Gupta793963d2020-12-09 14:02:41 +05301#
2# Copyright 2018-2020 NXP
3#
4# SPDX-License-Identifier: BSD-3-Clause
5#
6
7# board-specific build parameters
8
9BOOT_MODE ?= flexspi_nor
10BOARD ?= lx2160aqds
11POVDD_ENABLE := no
12NXP_COINED_BB := no
13
14 # DDR Compilation Configs
15NUM_OF_DDRC := 1
16DDRC_NUM_DIMM := 1
17DDRC_NUM_CS := 2
18DDR_ECC_EN := yes
19 #enable address decoding feature
20DDR_ADDR_DEC := yes
21APPLY_MAX_CDD := yes
22
23# DDR Errata
24ERRATA_DDR_A011396 := 1
25ERRATA_DDR_A050450 := 1
26
27 # On-Board Flash Details
28FLASH_TYPE := MT35XU512A
29XSPI_FLASH_SZ := 0x10000000
30NXP_XSPI_NOR_UNIT_SIZE := 0x20000
31BL2_BIN_XSPI_NOR_END_ADDRESS := 0x100000
32# CONFIG_FSPI_ERASE_4K is required to erase 4K sector sizes. This
33# config is enabled for future use cases.
34FSPI_ERASE_4K := 0
35
Jiafei Panadf14fe2021-01-04 15:59:54 +080036# Platform specific features.
Pankaj Gupta793963d2020-12-09 14:02:41 +053037WARM_BOOT := yes
38
Jiafei Panadf14fe2021-01-04 15:59:54 +080039# Adding Platform files build files
Pankaj Gupta793963d2020-12-09 14:02:41 +053040BL2_SOURCES += ${BOARD_PATH}/ddr_init.c\
41 ${BOARD_PATH}/platform.c
42
Jiafei Pan77862132021-04-27 14:49:22 +080043SUPPORTED_BOOT_MODE := flexspi_nor \
44 sd \
45 emmc
46
Jiafei Panadf14fe2021-01-04 15:59:54 +080047# Adding platform board build info
48include plat/nxp/common/plat_make_helper/plat_common_def.mk
49
50# Adding SoC build info
Pankaj Gupta793963d2020-12-09 14:02:41 +053051include plat/nxp/soc-lx2160a/soc.mk