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Achin Gupta4f6ad662013-10-25 09:08:21 +01001/*
Dan Handleye83b0ca2014-01-14 18:17:09 +00002 * Copyright (c) 2013-2014, ARM Limited and Contributors. All rights reserved.
Achin Gupta4f6ad662013-10-25 09:08:21 +01003 *
dp-armfa3cf0b2017-05-03 09:38:09 +01004 * SPDX-License-Identifier: BSD-3-Clause
Achin Gupta4f6ad662013-10-25 09:08:21 +01005 */
6
Dan Handley2bd4ef22014-04-09 13:14:54 +01007#include <arch.h>
Achin Gupta4f6ad662013-10-25 09:08:21 +01008#include <arch_helpers.h>
Achin Gupta4f6ad662013-10-25 09:08:21 +01009
10/*******************************************************************************
11 * Function that does the first bit of architectural setup that affects
12 * execution in the non-secure address space.
13 ******************************************************************************/
14void bl1_arch_setup(void)
15{
Achin Guptaed1744e2014-08-04 23:13:10 +010016 /* Set the next EL to be AArch64 */
Gerald Lejeune632d6df2016-03-22 09:29:23 +010017 write_scr_el3(read_scr_el3() | SCR_RW_BIT);
Achin Gupta4f6ad662013-10-25 09:08:21 +010018}
19
20/*******************************************************************************
21 * Set the Secure EL1 required architectural state
22 ******************************************************************************/
Juan Castillo2d552402014-06-13 17:05:10 +010023void bl1_arch_next_el_setup(void)
24{
Vikram Kanigiri78a6e0c2014-03-11 17:41:00 +000025 unsigned long next_sctlr;
Achin Gupta4f6ad662013-10-25 09:08:21 +010026
27 /* Use the same endianness than the current BL */
Vikram Kanigiri78a6e0c2014-03-11 17:41:00 +000028 next_sctlr = (read_sctlr_el3() & SCTLR_EE_BIT);
Achin Gupta4f6ad662013-10-25 09:08:21 +010029
30 /* Set SCTLR Secure EL1 */
31 next_sctlr |= SCTLR_EL1_RES1;
32
33 write_sctlr_el1(next_sctlr);
34}