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Achin Gupta7c88f3f2014-02-18 18:09:12 +00001/*
2 * Copyright (c) 2013-2014, ARM Limited and Contributors. All rights reserved.
3 *
4 * Redistribution and use in source and binary forms, with or without
5 * modification, are permitted provided that the following conditions are met:
6 *
7 * Redistributions of source code must retain the above copyright notice, this
8 * list of conditions and the following disclaimer.
9 *
10 * Redistributions in binary form must reproduce the above copyright notice,
11 * this list of conditions and the following disclaimer in the documentation
12 * and/or other materials provided with the distribution.
13 *
14 * Neither the name of ARM nor the names of its contributors may be used
15 * to endorse or promote products derived from this software without specific
16 * prior written permission.
17 *
18 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
19 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
20 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
21 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
22 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
23 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
24 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
25 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
26 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
27 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
28 * POSSIBILITY OF SUCH DAMAGE.
29 */
30
31#ifndef __TSP_H__
32#define __TSP_H__
33
Achin Gupta7c88f3f2014-02-18 18:09:12 +000034/*
35 * SMC function IDs that TSP uses to signal various forms of completions
36 * to the secure payload dispatcher.
37 */
38#define TSP_ENTRY_DONE 0xf2000000
39#define TSP_ON_DONE 0xf2000001
40#define TSP_OFF_DONE 0xf2000002
41#define TSP_SUSPEND_DONE 0xf2000003
42#define TSP_RESUME_DONE 0xf2000004
43#define TSP_WORK_DONE 0xf2000005
44
Achin Gupta76717892014-05-09 11:42:56 +010045/*
46 * Function identifiers to handle FIQs through the synchronous handling model.
47 * If the TSP was previously interrupted then control has to be returned to
48 * the TSPD after handling the interrupt else execution can remain in the TSP.
49 */
50#define TSP_HANDLED_S_EL1_FIQ 0xf2000006
51#define TSP_EL3_FIQ 0xf2000007
52#define TSP_HANDLE_FIQ_AND_RETURN 0x2004
53
54/* SMC function ID that TSP uses to request service from secure monitor */
Achin Gupta7c88f3f2014-02-18 18:09:12 +000055#define TSP_GET_ARGS 0xf2001000
56
57/* Function IDs for various TSP services */
58#define TSP_FID_ADD 0xf2002000
59#define TSP_FID_SUB 0xf2002001
60#define TSP_FID_MUL 0xf2002002
61#define TSP_FID_DIV 0xf2002003
62
Jeenu Viswambharandf1ddb52014-02-28 11:23:35 +000063/*
64 * Total number of function IDs implemented for services offered to NS clients.
65 * The function IDs are defined above
66 */
67#define TSP_NUM_FID 0x4
68
69/* TSP implementation version numbers */
70#define TSP_VERSION_MAJOR 0x0 /* Major version */
71#define TSP_VERSION_MINOR 0x1 /* Minor version */
72
73/*
74 * Standard Trusted OS Function IDs that fall under Trusted OS call range
75 * according to SMC calling convention
76 */
77#define TOS_CALL_COUNT 0xbf00ff00 /* Number of calls implemented */
78#define TOS_UID 0xbf00ff01 /* Implementation UID */
79/* 0xbf00ff02 is reserved */
80#define TOS_CALL_VERSION 0xbf00ff03 /* Trusted OS Call Version */
81
Achin Gupta7c88f3f2014-02-18 18:09:12 +000082/* Definitions to help the assembler access the SMC/ERET args structure */
83#define TSP_ARGS_SIZE 0x40
84#define TSP_ARG0 0x0
85#define TSP_ARG1 0x8
86#define TSP_ARG2 0x10
87#define TSP_ARG3 0x18
88#define TSP_ARG4 0x20
89#define TSP_ARG5 0x28
90#define TSP_ARG6 0x30
91#define TSP_ARG7 0x38
92#define TSP_ARGS_END 0x40
93
94#ifndef __ASSEMBLY__
Dan Handley2bd4ef22014-04-09 13:14:54 +010095
96#include <cassert.h>
97#include <platform.h> /* For CACHE_WRITEBACK_GRANULE */
Achin Gupta76717892014-05-09 11:42:56 +010098#include <spinlock.h>
Achin Gupta7c88f3f2014-02-18 18:09:12 +000099#include <stdint.h>
100
Dan Handleye2712bc2014-04-10 15:37:22 +0100101typedef void (*tsp_generic_fptr_t)(uint64_t arg0,
Achin Gupta76717892014-05-09 11:42:56 +0100102 uint64_t arg1,
103 uint64_t arg2,
104 uint64_t arg3,
105 uint64_t arg4,
106 uint64_t arg5,
107 uint64_t arg6,
108 uint64_t arg7);
Achin Gupta7c88f3f2014-02-18 18:09:12 +0000109
Dan Handleye2712bc2014-04-10 15:37:22 +0100110typedef struct entry_info {
111 tsp_generic_fptr_t fast_smc_entry;
112 tsp_generic_fptr_t cpu_on_entry;
113 tsp_generic_fptr_t cpu_off_entry;
114 tsp_generic_fptr_t cpu_resume_entry;
115 tsp_generic_fptr_t cpu_suspend_entry;
Achin Gupta76717892014-05-09 11:42:56 +0100116 tsp_generic_fptr_t fiq_entry;
Dan Handleye2712bc2014-04-10 15:37:22 +0100117} entry_info_t;
Achin Gupta7c88f3f2014-02-18 18:09:12 +0000118
Dan Handleye2712bc2014-04-10 15:37:22 +0100119typedef struct work_statistics {
Achin Gupta76717892014-05-09 11:42:56 +0100120 uint32_t fiq_count; /* Number of FIQs on this cpu */
121 uint32_t sync_fiq_count; /* Number of sync. fiqs on this cpu */
122 uint32_t sync_fiq_ret_count; /* Number of fiq returns on this cpu */
Achin Gupta7c88f3f2014-02-18 18:09:12 +0000123 uint32_t smc_count; /* Number of returns on this cpu */
124 uint32_t eret_count; /* Number of entries on this cpu */
125 uint32_t cpu_on_count; /* Number of cpu on requests */
126 uint32_t cpu_off_count; /* Number of cpu off requests */
127 uint32_t cpu_suspend_count; /* Number of cpu suspend requests */
128 uint32_t cpu_resume_count; /* Number of cpu resume requests */
Dan Handleye2712bc2014-04-10 15:37:22 +0100129} __aligned(CACHE_WRITEBACK_GRANULE) work_statistics_t;
Achin Gupta7c88f3f2014-02-18 18:09:12 +0000130
Dan Handleye2712bc2014-04-10 15:37:22 +0100131typedef struct tsp_args {
Achin Gupta7c88f3f2014-02-18 18:09:12 +0000132 uint64_t _regs[TSP_ARGS_END >> 3];
Dan Handleye2712bc2014-04-10 15:37:22 +0100133} __aligned(CACHE_WRITEBACK_GRANULE) tsp_args_t;
Achin Gupta7c88f3f2014-02-18 18:09:12 +0000134
135/* Macros to access members of the above structure using their offsets */
136#define read_sp_arg(args, offset) ((args)->_regs[offset >> 3])
Achin Gupta76717892014-05-09 11:42:56 +0100137#define write_sp_arg(args, offset, val) (((args)->_regs[offset >> 3]) \
Achin Gupta7c88f3f2014-02-18 18:09:12 +0000138 = val)
139
140/*
141 * Ensure that the assembler's view of the size of the tsp_args is the
142 * same as the compilers
143 */
Dan Handleye2712bc2014-04-10 15:37:22 +0100144CASSERT(TSP_ARGS_SIZE == sizeof(tsp_args_t), assert_sp_args_size_mismatch);
Achin Gupta7c88f3f2014-02-18 18:09:12 +0000145
146extern void tsp_get_magic(uint64_t args[4]);
147
Achin Gupta76717892014-05-09 11:42:56 +0100148extern void tsp_fiq_entry(uint64_t arg0,
149 uint64_t arg1,
150 uint64_t arg2,
151 uint64_t arg3,
152 uint64_t arg4,
153 uint64_t arg5,
154 uint64_t arg6,
155 uint64_t arg7);
Achin Gupta7c88f3f2014-02-18 18:09:12 +0000156extern void tsp_fast_smc_entry(uint64_t arg0,
157 uint64_t arg1,
158 uint64_t arg2,
159 uint64_t arg3,
160 uint64_t arg4,
161 uint64_t arg5,
162 uint64_t arg6,
163 uint64_t arg7);
164extern void tsp_cpu_resume_entry(uint64_t arg0,
165 uint64_t arg1,
166 uint64_t arg2,
167 uint64_t arg3,
168 uint64_t arg4,
169 uint64_t arg5,
170 uint64_t arg6,
171 uint64_t arg7);
Dan Handleye2712bc2014-04-10 15:37:22 +0100172extern tsp_args_t *tsp_cpu_resume_main(uint64_t arg0,
Achin Gupta7c88f3f2014-02-18 18:09:12 +0000173 uint64_t arg1,
174 uint64_t arg2,
175 uint64_t arg3,
176 uint64_t arg4,
177 uint64_t arg5,
178 uint64_t arg6,
179 uint64_t arg7);
180extern void tsp_cpu_suspend_entry(uint64_t arg0,
181 uint64_t arg1,
182 uint64_t arg2,
183 uint64_t arg3,
184 uint64_t arg4,
185 uint64_t arg5,
186 uint64_t arg6,
187 uint64_t arg7);
Dan Handleye2712bc2014-04-10 15:37:22 +0100188extern tsp_args_t *tsp_cpu_suspend_main(uint64_t arg0,
Achin Gupta7c88f3f2014-02-18 18:09:12 +0000189 uint64_t arg1,
190 uint64_t arg2,
191 uint64_t arg3,
192 uint64_t arg4,
193 uint64_t arg5,
194 uint64_t arg6,
195 uint64_t arg7);
196extern void tsp_cpu_on_entry(uint64_t arg0,
197 uint64_t arg1,
198 uint64_t arg2,
199 uint64_t arg3,
200 uint64_t arg4,
201 uint64_t arg5,
202 uint64_t arg6,
203 uint64_t arg7);
Dan Handleye2712bc2014-04-10 15:37:22 +0100204extern tsp_args_t *tsp_cpu_on_main(void);
Achin Gupta7c88f3f2014-02-18 18:09:12 +0000205extern void tsp_cpu_off_entry(uint64_t arg0,
206 uint64_t arg1,
207 uint64_t arg2,
208 uint64_t arg3,
209 uint64_t arg4,
210 uint64_t arg5,
211 uint64_t arg6,
212 uint64_t arg7);
Dan Handleye2712bc2014-04-10 15:37:22 +0100213extern tsp_args_t *tsp_cpu_off_main(uint64_t arg0,
Achin Gupta7c88f3f2014-02-18 18:09:12 +0000214 uint64_t arg1,
215 uint64_t arg2,
216 uint64_t arg3,
217 uint64_t arg4,
218 uint64_t arg5,
219 uint64_t arg6,
220 uint64_t arg7);
Achin Gupta405406d2014-05-09 12:00:17 +0100221
222/* Generic Timer functions */
223extern void tsp_generic_timer_start(void);
224extern void tsp_generic_timer_handler(void);
225extern void tsp_generic_timer_stop(void);
226extern void tsp_generic_timer_save(void);
227extern void tsp_generic_timer_restore(void);
Achin Gupta76717892014-05-09 11:42:56 +0100228
229/* FIQ management functions */
230extern void tsp_update_sync_fiq_stats(uint32_t type, uint64_t elr_el3);
231
232/* Data structure to keep track of TSP statistics */
233extern spinlock_t console_lock;
234extern work_statistics_t tsp_stats[PLATFORM_CORE_COUNT];
Achin Gupta7c88f3f2014-02-18 18:09:12 +0000235#endif /* __ASSEMBLY__ */
236
237#endif /* __BL2_H__ */