Aditya Angadi | aaa7b27 | 2020-11-19 17:32:41 +0530 | [diff] [blame] | 1 | /* |
Tamas Ban | 43e0d92 | 2023-05-08 13:41:29 +0200 | [diff] [blame] | 2 | * Copyright (c) 2021-2024, Arm Limited and Contributors. All rights reserved. |
Aditya Angadi | aaa7b27 | 2020-11-19 17:32:41 +0530 | [diff] [blame] | 3 | * |
| 4 | * SPDX-License-Identifier: BSD-3-Clause |
| 5 | */ |
| 6 | |
| 7 | #include <assert.h> |
| 8 | |
| 9 | #include <platform_def.h> |
| 10 | |
Tamas Ban | 43e0d92 | 2023-05-08 13:41:29 +0200 | [diff] [blame] | 11 | #include <lib/utils_def.h> |
| 12 | #include <drivers/arm/css/sds.h> |
| 13 | #include <drivers/arm/sbsa.h> |
Aditya Angadi | aaa7b27 | 2020-11-19 17:32:41 +0530 | [diff] [blame] | 14 | #include <plat/arm/common/plat_arm.h> |
| 15 | #include <plat/common/platform.h> |
Aditya Angadi | aaa7b27 | 2020-11-19 17:32:41 +0530 | [diff] [blame] | 16 | |
Omkar Anand Kulkarni | 2994dc0 | 2021-01-22 12:58:08 +0530 | [diff] [blame] | 17 | #if SPM_MM |
| 18 | #include <services/spm_mm_partition.h> |
| 19 | #endif |
| 20 | |
Aditya Angadi | aaa7b27 | 2020-11-19 17:32:41 +0530 | [diff] [blame] | 21 | /* |
| 22 | * Table of regions for different BL stages to map using the MMU. |
| 23 | */ |
| 24 | #if IMAGE_BL1 |
| 25 | const mmap_region_t plat_arm_mmap[] = { |
| 26 | ARM_MAP_SHARED_RAM, |
| 27 | SGI_MAP_FLASH0_RO, |
| 28 | CSS_SGI_MAP_DEVICE, |
| 29 | SOC_PLATFORM_PERIPH_MAP_DEVICE, |
| 30 | SOC_SYSTEM_PERIPH_MAP_DEVICE, |
| 31 | {0} |
| 32 | }; |
| 33 | #endif |
| 34 | |
| 35 | #if IMAGE_BL2 |
| 36 | const mmap_region_t plat_arm_mmap[] = { |
| 37 | ARM_MAP_SHARED_RAM, |
| 38 | SGI_MAP_FLASH0_RO, |
| 39 | #ifdef PLAT_ARM_MEM_PROT_ADDR |
| 40 | ARM_V2M_MAP_MEM_PROTECT, |
| 41 | #endif |
| 42 | CSS_SGI_MAP_DEVICE, |
| 43 | SOC_MEMCNTRL_MAP_DEVICE, |
| 44 | SOC_PLATFORM_PERIPH_MAP_DEVICE, |
| 45 | SOC_SYSTEM_PERIPH_MAP_DEVICE, |
| 46 | ARM_MAP_NS_DRAM1, |
Aditya Angadi | ccae8a1 | 2021-08-09 09:38:58 +0530 | [diff] [blame] | 47 | #if CSS_SGI_CHIP_COUNT > 1 |
| 48 | SOC_MEMCNTRL_MAP_DEVICE_REMOTE_CHIP(1), |
| 49 | #endif |
| 50 | #if CSS_SGI_CHIP_COUNT > 2 |
| 51 | SOC_MEMCNTRL_MAP_DEVICE_REMOTE_CHIP(2), |
| 52 | #endif |
| 53 | #if CSS_SGI_CHIP_COUNT > 3 |
| 54 | SOC_MEMCNTRL_MAP_DEVICE_REMOTE_CHIP(3), |
| 55 | #endif |
Aditya Angadi | aaa7b27 | 2020-11-19 17:32:41 +0530 | [diff] [blame] | 56 | #if ARM_BL31_IN_DRAM |
| 57 | ARM_MAP_BL31_SEC_DRAM, |
| 58 | #endif |
Nishant Sharma | e78ef3d | 2023-10-12 10:37:54 +0100 | [diff] [blame] | 59 | #if SPM_MM || (SPMC_AT_EL3 && SPMC_AT_EL3_SEL0_SP) |
Omkar Anand Kulkarni | 2994dc0 | 2021-01-22 12:58:08 +0530 | [diff] [blame] | 60 | ARM_SP_IMAGE_MMAP, |
| 61 | #endif |
Arvind Ram Prakash | 11b9b49 | 2022-11-22 14:41:00 -0600 | [diff] [blame] | 62 | #if TRUSTED_BOARD_BOOT && !RESET_TO_BL2 |
Aditya Angadi | aaa7b27 | 2020-11-19 17:32:41 +0530 | [diff] [blame] | 63 | ARM_MAP_BL1_RW, |
| 64 | #endif |
| 65 | {0} |
| 66 | }; |
| 67 | #endif |
| 68 | |
| 69 | #if IMAGE_BL31 |
| 70 | const mmap_region_t plat_arm_mmap[] = { |
| 71 | ARM_MAP_SHARED_RAM, |
| 72 | #ifdef PLAT_ARM_MEM_PROT_ADDR |
| 73 | ARM_V2M_MAP_MEM_PROTECT, |
| 74 | #endif |
| 75 | CSS_SGI_MAP_DEVICE, |
| 76 | SOC_PLATFORM_PERIPH_MAP_DEVICE, |
| 77 | SOC_SYSTEM_PERIPH_MAP_DEVICE, |
Nishant Sharma | e78ef3d | 2023-10-12 10:37:54 +0100 | [diff] [blame] | 78 | #if SPM_MM || (SPMC_AT_EL3 && SPMC_AT_EL3_SEL0_SP) |
Omkar Anand Kulkarni | 2994dc0 | 2021-01-22 12:58:08 +0530 | [diff] [blame] | 79 | ARM_SPM_BUF_EL3_MMAP, |
| 80 | #endif |
Aditya Angadi | aaa7b27 | 2020-11-19 17:32:41 +0530 | [diff] [blame] | 81 | {0} |
| 82 | }; |
| 83 | |
Omkar Anand Kulkarni | 2994dc0 | 2021-01-22 12:58:08 +0530 | [diff] [blame] | 84 | #if SPM_MM && defined(IMAGE_BL31) |
| 85 | const mmap_region_t plat_arm_secure_partition_mmap[] = { |
| 86 | PLAT_ARM_SECURE_MAP_SYSTEMREG, |
| 87 | PLAT_ARM_SECURE_MAP_NOR2, |
Rohit Mathew | 9c07f60 | 2021-12-13 15:33:04 +0000 | [diff] [blame] | 88 | SOC_PLATFORM_SECURE_UART, |
Omkar Anand Kulkarni | 2994dc0 | 2021-01-22 12:58:08 +0530 | [diff] [blame] | 89 | SOC_PLATFORM_PERIPH_MAP_DEVICE_USER, |
| 90 | ARM_SP_IMAGE_MMAP, |
| 91 | ARM_SP_IMAGE_NS_BUF_MMAP, |
Manish Pandey | f90a73c | 2023-10-10 15:42:19 +0100 | [diff] [blame] | 92 | #if ENABLE_FEAT_RAS && FFH_SUPPORT |
Omkar Anand Kulkarni | 1676ace | 2022-09-24 20:41:04 +0530 | [diff] [blame] | 93 | CSS_SGI_SP_CPER_BUF_MMAP, |
| 94 | #endif |
Omkar Anand Kulkarni | 2994dc0 | 2021-01-22 12:58:08 +0530 | [diff] [blame] | 95 | ARM_SP_IMAGE_RW_MMAP, |
| 96 | ARM_SPM_BUF_EL0_MMAP, |
| 97 | {0} |
| 98 | }; |
| 99 | #endif /* SPM_MM && defined(IMAGE_BL31) */ |
Aditya Angadi | aaa7b27 | 2020-11-19 17:32:41 +0530 | [diff] [blame] | 100 | #endif |
| 101 | |
| 102 | ARM_CASSERT_MMAP |
| 103 | |
Omkar Anand Kulkarni | 2994dc0 | 2021-01-22 12:58:08 +0530 | [diff] [blame] | 104 | #if SPM_MM && defined(IMAGE_BL31) |
| 105 | /* |
| 106 | * Boot information passed to a secure partition during initialisation. Linear |
| 107 | * indices in MP information will be filled at runtime. |
| 108 | */ |
| 109 | static spm_mm_mp_info_t sp_mp_info[] = { |
| 110 | [0] = {0x81000000, 0}, |
| 111 | [1] = {0x81010000, 0}, |
| 112 | [2] = {0x81020000, 0}, |
| 113 | [3] = {0x81030000, 0}, |
| 114 | [4] = {0x81040000, 0}, |
| 115 | [5] = {0x81050000, 0}, |
| 116 | [6] = {0x81060000, 0}, |
| 117 | [7] = {0x81070000, 0}, |
| 118 | [8] = {0x81080000, 0}, |
| 119 | [9] = {0x81090000, 0}, |
| 120 | [10] = {0x810a0000, 0}, |
| 121 | [11] = {0x810b0000, 0}, |
| 122 | [12] = {0x810c0000, 0}, |
| 123 | [13] = {0x810d0000, 0}, |
| 124 | [14] = {0x810e0000, 0}, |
| 125 | [15] = {0x810f0000, 0}, |
| 126 | }; |
| 127 | |
| 128 | const spm_mm_boot_info_t plat_arm_secure_partition_boot_info = { |
| 129 | .h.type = PARAM_SP_IMAGE_BOOT_INFO, |
| 130 | .h.version = VERSION_1, |
| 131 | .h.size = sizeof(spm_mm_boot_info_t), |
| 132 | .h.attr = 0, |
| 133 | .sp_mem_base = ARM_SP_IMAGE_BASE, |
| 134 | .sp_mem_limit = ARM_SP_IMAGE_LIMIT, |
| 135 | .sp_image_base = ARM_SP_IMAGE_BASE, |
| 136 | .sp_stack_base = PLAT_SP_IMAGE_STACK_BASE, |
| 137 | .sp_heap_base = ARM_SP_IMAGE_HEAP_BASE, |
| 138 | .sp_ns_comm_buf_base = PLAT_SP_IMAGE_NS_BUF_BASE, |
| 139 | .sp_shared_buf_base = PLAT_SPM_BUF_BASE, |
| 140 | .sp_image_size = ARM_SP_IMAGE_SIZE, |
| 141 | .sp_pcpu_stack_size = PLAT_SP_IMAGE_STACK_PCPU_SIZE, |
| 142 | .sp_heap_size = ARM_SP_IMAGE_HEAP_SIZE, |
| 143 | .sp_ns_comm_buf_size = PLAT_SP_IMAGE_NS_BUF_SIZE, |
| 144 | .sp_shared_buf_size = PLAT_SPM_BUF_SIZE, |
| 145 | .num_sp_mem_regions = ARM_SP_IMAGE_NUM_MEM_REGIONS, |
| 146 | .num_cpus = PLATFORM_CORE_COUNT, |
| 147 | .mp_info = &sp_mp_info[0], |
| 148 | }; |
| 149 | |
| 150 | const struct mmap_region *plat_get_secure_partition_mmap(void *cookie) |
| 151 | { |
| 152 | return plat_arm_secure_partition_mmap; |
| 153 | } |
| 154 | |
| 155 | const struct spm_mm_boot_info *plat_get_secure_partition_boot_info( |
| 156 | void *cookie) |
| 157 | { |
| 158 | return &plat_arm_secure_partition_boot_info; |
| 159 | } |
| 160 | #endif /* SPM_MM && defined(IMAGE_BL31) */ |
| 161 | |
Aditya Angadi | aaa7b27 | 2020-11-19 17:32:41 +0530 | [diff] [blame] | 162 | #if TRUSTED_BOARD_BOOT |
| 163 | int plat_get_mbedtls_heap(void **heap_addr, size_t *heap_size) |
| 164 | { |
| 165 | assert(heap_addr != NULL); |
| 166 | assert(heap_size != NULL); |
| 167 | |
| 168 | return arm_get_mbedtls_heap(heap_addr, heap_size); |
| 169 | } |
| 170 | #endif |
| 171 | |
| 172 | void plat_arm_secure_wdt_start(void) |
| 173 | { |
| 174 | sbsa_wdog_start(SBSA_SECURE_WDOG_BASE, SBSA_SECURE_WDOG_TIMEOUT); |
| 175 | } |
| 176 | |
| 177 | void plat_arm_secure_wdt_stop(void) |
| 178 | { |
| 179 | sbsa_wdog_stop(SBSA_SECURE_WDOG_BASE); |
| 180 | } |
Tamas Ban | 43e0d92 | 2023-05-08 13:41:29 +0200 | [diff] [blame] | 181 | |
| 182 | static sds_region_desc_t sgi_sds_regions[] = { |
| 183 | { .base = PLAT_ARM_SDS_MEM_BASE }, |
| 184 | }; |
| 185 | |
| 186 | sds_region_desc_t *plat_sds_get_regions(unsigned int *region_count) |
| 187 | { |
| 188 | *region_count = ARRAY_SIZE(sgi_sds_regions); |
| 189 | |
| 190 | return sgi_sds_regions; |
| 191 | } |