Dan Handley | 9df4804 | 2015-03-19 18:58:55 +0000 | [diff] [blame] | 1 | /* |
Sandrine Bailleux | 4a1267a | 2016-05-18 16:11:47 +0100 | [diff] [blame] | 2 | * Copyright (c) 2015-2016, ARM Limited and Contributors. All rights reserved. |
Dan Handley | 9df4804 | 2015-03-19 18:58:55 +0000 | [diff] [blame] | 3 | * |
dp-arm | fa3cf0b | 2017-05-03 09:38:09 +0100 | [diff] [blame] | 4 | * SPDX-License-Identifier: BSD-3-Clause |
Dan Handley | 9df4804 | 2015-03-19 18:58:55 +0000 | [diff] [blame] | 5 | */ |
| 6 | |
| 7 | #include <arm_def.h> |
| 8 | #include <bl_common.h> |
| 9 | #include <console.h> |
| 10 | #include <platform_def.h> |
| 11 | #include <platform_tsp.h> |
| 12 | #include <plat_arm.h> |
| 13 | |
Dan Handley | 9df4804 | 2015-03-19 18:58:55 +0000 | [diff] [blame] | 14 | #define BL32_END (unsigned long)(&__BL32_END__) |
| 15 | |
Dan Handley | 9df4804 | 2015-03-19 18:58:55 +0000 | [diff] [blame] | 16 | /* Weak definitions may be overridden in specific ARM standard platform */ |
| 17 | #pragma weak tsp_early_platform_setup |
| 18 | #pragma weak tsp_platform_setup |
| 19 | #pragma weak tsp_plat_arch_setup |
| 20 | |
| 21 | |
| 22 | /******************************************************************************* |
| 23 | * Initialize the UART |
| 24 | ******************************************************************************/ |
| 25 | void arm_tsp_early_platform_setup(void) |
| 26 | { |
| 27 | /* |
| 28 | * Initialize a different console than already in use to display |
| 29 | * messages from TSP |
| 30 | */ |
| 31 | console_init(PLAT_ARM_TSP_UART_BASE, PLAT_ARM_TSP_UART_CLK_IN_HZ, |
| 32 | ARM_CONSOLE_BAUDRATE); |
| 33 | } |
| 34 | |
| 35 | void tsp_early_platform_setup(void) |
| 36 | { |
| 37 | arm_tsp_early_platform_setup(); |
| 38 | } |
| 39 | |
| 40 | /******************************************************************************* |
| 41 | * Perform platform specific setup placeholder |
| 42 | ******************************************************************************/ |
| 43 | void tsp_platform_setup(void) |
| 44 | { |
Achin Gupta | 1fa7eb6 | 2015-11-03 14:18:34 +0000 | [diff] [blame] | 45 | plat_arm_gic_driver_init(); |
Dan Handley | 9df4804 | 2015-03-19 18:58:55 +0000 | [diff] [blame] | 46 | } |
| 47 | |
| 48 | /******************************************************************************* |
| 49 | * Perform the very early platform specific architectural setup here. At the |
| 50 | * moment this is only intializes the MMU |
| 51 | ******************************************************************************/ |
| 52 | void tsp_plat_arch_setup(void) |
| 53 | { |
Sandrine Bailleux | ecdc4d3 | 2016-07-08 14:38:16 +0100 | [diff] [blame] | 54 | arm_setup_page_tables(BL32_BASE, |
| 55 | (BL32_END - BL32_BASE), |
| 56 | BL_CODE_BASE, |
Masahiro Yamada | 51bef61 | 2017-01-18 02:10:08 +0900 | [diff] [blame] | 57 | BL_CODE_END, |
Sandrine Bailleux | ecdc4d3 | 2016-07-08 14:38:16 +0100 | [diff] [blame] | 58 | BL_RO_DATA_BASE, |
Masahiro Yamada | 51bef61 | 2017-01-18 02:10:08 +0900 | [diff] [blame] | 59 | BL_RO_DATA_END |
Dan Handley | 9df4804 | 2015-03-19 18:58:55 +0000 | [diff] [blame] | 60 | #if USE_COHERENT_MEM |
Masahiro Yamada | 0fac5af | 2016-12-28 16:11:41 +0900 | [diff] [blame] | 61 | , BL_COHERENT_RAM_BASE, |
| 62 | BL_COHERENT_RAM_END |
Dan Handley | 9df4804 | 2015-03-19 18:58:55 +0000 | [diff] [blame] | 63 | #endif |
| 64 | ); |
Sandrine Bailleux | 4a1267a | 2016-05-18 16:11:47 +0100 | [diff] [blame] | 65 | enable_mmu_el1(0); |
Dan Handley | 9df4804 | 2015-03-19 18:58:55 +0000 | [diff] [blame] | 66 | } |