blob: 012107e3b47d5e3c55d0459f78622bde2b34fb0e [file] [log] [blame]
Varun Wadekar1fd70492018-10-19 11:44:31 -07001/*
2 * Copyright (c) 2018, ARM Limited and Contributors. All rights reserved.
Varun Wadekar907599c2018-10-05 11:24:54 -07003 * Copyright (c) 2020, NVIDIA Corporation. All rights reserved.
Varun Wadekar1fd70492018-10-19 11:44:31 -07004 *
5 * SPDX-License-Identifier: BSD-3-Clause
6 */
7
8#include <assert.h>
Varun Wadekar1fd70492018-10-19 11:44:31 -07009#include <platform_def.h>
Antonio Nino Diaze0f90632018-12-14 00:18:21 +000010
11#include <common/bl_common.h>
12#include <drivers/arm/gicv2.h>
13#include <lib/utils.h>
Varun Wadekar907599c2018-10-05 11:24:54 -070014#include <plat/common/platform.h>
Antonio Nino Diaze0f90632018-12-14 00:18:21 +000015
Varun Wadekar1fd70492018-10-19 11:44:31 -070016#include <tegra_private.h>
17#include <tegra_def.h>
Varun Wadekar1fd70492018-10-19 11:44:31 -070018
Varun Wadekar907599c2018-10-05 11:24:54 -070019static unsigned int tegra_target_masks[PLATFORM_CORE_COUNT];
20
Varun Wadekar1fd70492018-10-19 11:44:31 -070021/******************************************************************************
22 * Tegra common helper to setup the GICv2 driver data.
23 *****************************************************************************/
Varun Wadekar9f4a7d32018-10-19 11:42:28 -070024void tegra_gic_setup(const interrupt_prop_t *interrupt_props,
25 unsigned int interrupt_props_num)
Varun Wadekar1fd70492018-10-19 11:44:31 -070026{
27 /*
28 * Tegra GIC configuration settings
29 */
30 static gicv2_driver_data_t tegra_gic_data;
31
32 /*
33 * Register Tegra GICv2 driver
34 */
35 tegra_gic_data.gicd_base = TEGRA_GICD_BASE;
36 tegra_gic_data.gicc_base = TEGRA_GICC_BASE;
Varun Wadekar9f4a7d32018-10-19 11:42:28 -070037 tegra_gic_data.interrupt_props = interrupt_props;
38 tegra_gic_data.interrupt_props_num = interrupt_props_num;
Varun Wadekar907599c2018-10-05 11:24:54 -070039 tegra_gic_data.target_masks = tegra_target_masks;
40 tegra_gic_data.target_masks_num = ARRAY_SIZE(tegra_target_masks);
Varun Wadekar1fd70492018-10-19 11:44:31 -070041 gicv2_driver_init(&tegra_gic_data);
42}
43
44/******************************************************************************
45 * Tegra common helper to initialize the GICv2 only driver.
46 *****************************************************************************/
47void tegra_gic_init(void)
48{
49 gicv2_distif_init();
50 gicv2_pcpu_distif_init();
Varun Wadekar907599c2018-10-05 11:24:54 -070051 gicv2_set_pe_target_mask(plat_my_core_pos());
Varun Wadekar1fd70492018-10-19 11:44:31 -070052 gicv2_cpuif_enable();
53}
54
55/******************************************************************************
56 * Tegra common helper to disable the GICv2 CPU interface
57 *****************************************************************************/
58void tegra_gic_cpuif_deactivate(void)
59{
60 gicv2_cpuif_disable();
61}
62
63/******************************************************************************
64 * Tegra common helper to initialize the per cpu distributor interface
65 * in GICv2
66 *****************************************************************************/
67void tegra_gic_pcpu_init(void)
68{
69 gicv2_pcpu_distif_init();
Varun Wadekar907599c2018-10-05 11:24:54 -070070 gicv2_set_pe_target_mask(plat_my_core_pos());
Varun Wadekar1fd70492018-10-19 11:44:31 -070071 gicv2_cpuif_enable();
72}