| Chungying Lu | a566cc9 | 2023-03-15 14:16:28 +0800 | [diff] [blame] | 1 | /* |
| 2 | * Copyright (c) 2023, MediaTek Inc. All rights reserved. |
| 3 | * |
| 4 | * SPDX-License-Identifier: BSD-3-Clause |
| 5 | */ |
| 6 | |
| 7 | #ifndef APUSYS_H |
| 8 | #define APUSYS_H |
| 9 | |
| 10 | #define MODULE_TAG "[APUSYS]" |
| 11 | |
| Chungying Lu | f1f14b3 | 2023-03-15 15:31:56 +0800 | [diff] [blame] | 12 | enum MTK_APUSYS_KERNEL_OP { |
| Chungying Lu | 15ffb07 | 2023-04-19 17:17:23 +0800 | [diff] [blame] | 13 | MTK_APUSYS_KERNEL_OP_APUSYS_PWR_TOP_ON, /* 0 */ |
| 14 | MTK_APUSYS_KERNEL_OP_APUSYS_PWR_TOP_OFF, /* 1 */ |
| 15 | MTK_APUSYS_KERNEL_OP_APUSYS_RV_SETUP_REVISER, /* 2 */ |
| 16 | MTK_APUSYS_KERNEL_OP_APUSYS_RV_RESET_MP, /* 3 */ |
| 17 | MTK_APUSYS_KERNEL_OP_APUSYS_RV_SETUP_BOOT, /* 4 */ |
| 18 | MTK_APUSYS_KERNEL_OP_APUSYS_RV_START_MP, /* 5 */ |
| 19 | MTK_APUSYS_KERNEL_OP_APUSYS_RV_STOP_MP, /* 6 */ |
| Karl Li | 03facb0 | 2023-04-24 16:45:49 +0800 | [diff] [blame] | 20 | MTK_APUSYS_KERNEL_OP_DEVAPC_INIT_RCX, /* 7 */ |
| Chungying Lu | 59c1c2b | 2023-04-25 15:39:10 +0800 | [diff] [blame] | 21 | MTK_APUSYS_KERNEL_OP_APUSYS_RV_SETUP_SEC_MEM, /* 8 */ |
| Chungying Lu | 4f3b5da | 2023-05-12 18:37:32 +0800 | [diff] [blame] | 22 | MTK_APUSYS_KERNEL_OP_APUSYS_RV_DISABLE_WDT_ISR, /* 9 */ |
| 23 | MTK_APUSYS_KERNEL_OP_APUSYS_RV_CLEAR_WDT_ISR, /* 10 */ |
| 24 | MTK_APUSYS_KERNEL_OP_APUSYS_RV_CG_GATING, /* 11 */ |
| 25 | MTK_APUSYS_KERNEL_OP_APUSYS_RV_CG_UNGATING, /* 12 */ |
| Chungying Lu | f1f14b3 | 2023-03-15 15:31:56 +0800 | [diff] [blame] | 26 | MTK_APUSYS_KERNEL_OP_NUM, |
| 27 | }; |
| 28 | |
| Chungying Lu | a566cc9 | 2023-03-15 14:16:28 +0800 | [diff] [blame] | 29 | #endif |