| Gabriel Fernandez | e824b2d | 2022-04-20 10:05:57 +0200 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0-or-later or BSD-3-Clause */ |
| 2 | /* |
| 3 | * Copyright (C) 2023, STMicroelectronics - All Rights Reserved |
| 4 | * Author(s): Gabriel Fernandez <gabriel.fernandez@foss.st.com> for STMicroelectronics. |
| 5 | */ |
| 6 | |
| 7 | #ifndef _DT_BINDINGS_STM32MP25_RESET_H_ |
| 8 | #define _DT_BINDINGS_STM32MP25_RESET_H_ |
| 9 | |
| 10 | #define SYS_R 8192 |
| 11 | #define C1_R 8224 |
| 12 | #define C1P1POR_R 8256 |
| 13 | #define C1P1_R 8257 |
| 14 | #define C2_R 8288 |
| 15 | #define C2_HOLDBOOT_R 8608 |
| 16 | #define C1_HOLDBOOT_R 8609 |
| 17 | #define VSW_R 8703 |
| 18 | #define C1MS_R 8808 |
| 19 | #define IWDG2_KER_R 9074 |
| 20 | #define IWDG4_KER_R 9202 |
| 21 | #define C3_R 9312 |
| 22 | #define DDRCP_R 9856 |
| 23 | #define DDRCAPB_R 9888 |
| 24 | #define DDRPHYCAPB_R 9920 |
| 25 | #define DDRCFG_R 9984 |
| 26 | #define DDR_R 10016 |
| 27 | #define OSPI1_R 10400 |
| 28 | #define OSPI1DLL_R 10416 |
| 29 | #define OSPI2_R 10432 |
| 30 | #define OSPI2DLL_R 10448 |
| 31 | #define FMC_R 10464 |
| 32 | #define DBG_R 10508 |
| 33 | #define GPIOA_R 10592 |
| 34 | #define GPIOB_R 10624 |
| 35 | #define GPIOC_R 10656 |
| 36 | #define GPIOD_R 10688 |
| 37 | #define GPIOE_R 10720 |
| 38 | #define GPIOF_R 10752 |
| 39 | #define GPIOG_R 10784 |
| 40 | #define GPIOH_R 10816 |
| 41 | #define GPIOI_R 10848 |
| 42 | #define GPIOJ_R 10880 |
| 43 | #define GPIOK_R 10912 |
| 44 | #define GPIOZ_R 10944 |
| 45 | #define HPDMA1_R 10976 |
| 46 | #define HPDMA2_R 11008 |
| 47 | #define HPDMA3_R 11040 |
| 48 | #define LPDMA_R 11072 |
| 49 | #define HSEM_R 11104 |
| 50 | #define IPCC1_R 11136 |
| 51 | #define IPCC2_R 11168 |
| 52 | #define IS2M_R 11360 |
| 53 | #define SSMOD_R 11392 |
| 54 | #define TIM1_R 14336 |
| 55 | #define TIM2_R 14368 |
| 56 | #define TIM3_R 14400 |
| 57 | #define TIM4_R 14432 |
| 58 | #define TIM5_R 14464 |
| 59 | #define TIM6_R 14496 |
| 60 | #define TIM7_R 14528 |
| 61 | #define TIM8_R 14560 |
| 62 | #define TIM10_R 14592 |
| 63 | #define TIM11_R 14624 |
| 64 | #define TIM12_R 14656 |
| 65 | #define TIM13_R 14688 |
| 66 | #define TIM14_R 14720 |
| 67 | #define TIM15_R 14752 |
| 68 | #define TIM16_R 14784 |
| 69 | #define TIM17_R 14816 |
| 70 | #define TIM20_R 14848 |
| 71 | #define LPTIM1_R 14880 |
| 72 | #define LPTIM2_R 14912 |
| 73 | #define LPTIM3_R 14944 |
| 74 | #define LPTIM4_R 14976 |
| 75 | #define LPTIM5_R 15008 |
| 76 | #define SPI1_R 15040 |
| 77 | #define SPI2_R 15072 |
| 78 | #define SPI3_R 15104 |
| 79 | #define SPI4_R 15136 |
| 80 | #define SPI5_R 15168 |
| 81 | #define SPI6_R 15200 |
| 82 | #define SPI7_R 15232 |
| 83 | #define SPI8_R 15264 |
| 84 | #define SPDIFRX_R 15296 |
| 85 | #define USART1_R 15328 |
| 86 | #define USART2_R 15360 |
| 87 | #define USART3_R 15392 |
| 88 | #define UART4_R 15424 |
| 89 | #define UART5_R 15456 |
| 90 | #define USART6_R 15488 |
| 91 | #define UART7_R 15520 |
| 92 | #define UART8_R 15552 |
| 93 | #define UART9_R 15584 |
| 94 | #define LPUART1_R 15616 |
| 95 | #define I2C1_R 15648 |
| 96 | #define I2C2_R 15680 |
| 97 | #define I2C3_R 15712 |
| 98 | #define I2C4_R 15744 |
| 99 | #define I2C5_R 15776 |
| 100 | #define I2C6_R 15808 |
| 101 | #define I2C7_R 15840 |
| 102 | #define I2C8_R 15872 |
| 103 | #define SAI1_R 15904 |
| 104 | #define SAI2_R 15936 |
| 105 | #define SAI3_R 15968 |
| 106 | #define SAI4_R 16000 |
| 107 | #define MDF1_R 16064 |
| 108 | #define MDF2_R 16096 |
| 109 | #define FDCAN_R 16128 |
| 110 | #define HDP_R 16160 |
| 111 | #define ADC12_R 16192 |
| 112 | #define ADC3_R 16224 |
| 113 | #define ETH1_R 16256 |
| 114 | #define ETH2_R 16288 |
| 115 | #define USB2_R 16352 |
| 116 | #define USB2PHY1_R 16384 |
| 117 | #define USB2PHY2_R 16416 |
| 118 | #define USB3DRD_R 16448 |
| 119 | #define USB3PCIEPHY_R 16480 |
| 120 | #define PCIE_R 16512 |
| 121 | #define USBTC_R 16544 |
| 122 | #define ETHSW_R 16576 |
| 123 | #define SDMMC1_R 16768 |
| 124 | #define SDMMC1DLL_R 16784 |
| 125 | #define SDMMC2_R 16800 |
| 126 | #define SDMMC2DLL_R 16816 |
| 127 | #define SDMMC3_R 16832 |
| 128 | #define SDMMC3DLL_R 16848 |
| 129 | #define GPU_R 16864 |
| 130 | #define LTDC_R 16896 |
| 131 | #define DSI_R 16928 |
| 132 | #define LVDS_R 17024 |
| 133 | #define CSI_R 17088 |
| 134 | #define DCMIPP_R 17120 |
| 135 | #define CCI_R 17152 |
| 136 | #define VDEC_R 17184 |
| 137 | #define VENC_R 17216 |
| 138 | #define RNG_R 17280 |
| 139 | #define PKA_R 17312 |
| 140 | #define SAES_R 17344 |
| 141 | #define HASH_R 17376 |
| 142 | #define CRYP1_R 17408 |
| 143 | #define CRYP2_R 17440 |
| 144 | #define WWDG1_R 17632 |
| 145 | #define WWDG2_R 17664 |
| 146 | #define BUSPERFM_R 17696 |
| 147 | #define VREF_R 17728 |
| 148 | #define DTS_R 17760 |
| 149 | #define CRC_R 17824 |
| 150 | #define SERC_R 17856 |
| 151 | #define OSPIIOM_R 17888 |
| 152 | #define I3C1_R 17984 |
| 153 | #define I3C2_R 18016 |
| 154 | #define I3C3_R 18048 |
| 155 | #define I3C4_R 18080 |
| 156 | |
| 157 | #define RST_SCMI_C1_R 0 |
| 158 | #define RST_SCMI_C2_R 1 |
| 159 | #define RST_SCMI_C1_HOLDBOOT_R 2 |
| 160 | #define RST_SCMI_C2_HOLDBOOT_R 3 |
| 161 | #define RST_SCMI_FMC 4 |
| 162 | #define RST_SCMI_PCIE 5 |
| 163 | |
| 164 | #endif /* _DT_BINDINGS_STM32MP25_RESET_H_ */ |