| Aditya Angadi | 74514e5 | 2019-04-16 11:30:25 +0530 | [diff] [blame] | 1 | /* |
| Madhukar Pappireddy | 4c3de56 | 2023-03-22 15:27:22 -0500 | [diff] [blame] | 2 | * Copyright (c) 2019-2023, Arm Limited. All rights reserved. |
| Aditya Angadi | 74514e5 | 2019-04-16 11:30:25 +0530 | [diff] [blame] | 3 | * |
| 4 | * SPDX-License-Identifier: BSD-3-Clause |
| 5 | */ |
| 6 | |
| 7 | #ifndef SBSA_H |
| 8 | #define SBSA_H |
| 9 | |
| 10 | #include <stdint.h> |
| 11 | |
| Madhukar Pappireddy | 4c3de56 | 2023-03-22 15:27:22 -0500 | [diff] [blame] | 12 | /* SBSA Secure Watchdog Register Offsets */ |
| 13 | /* Refresh frame */ |
| 14 | #define SBSA_WDOG_WRR_OFFSET UL(0x000) |
| 15 | #define SBSA_WDOG_WRR_REFRESH UL(0x1) |
| 16 | |
| 17 | /* Control and status frame */ |
| Aditya Angadi | 74514e5 | 2019-04-16 11:30:25 +0530 | [diff] [blame] | 18 | #define SBSA_WDOG_WCS_OFFSET UL(0x000) |
| 19 | #define SBSA_WDOG_WOR_LOW_OFFSET UL(0x008) |
| 20 | #define SBSA_WDOG_WOR_HIGH_OFFSET UL(0x00C) |
| 21 | |
| 22 | #define SBSA_WDOG_WCS_EN U(0x1) |
| 23 | |
| 24 | #define SBSA_WDOG_WOR_WIDTH UL(48) |
| 25 | |
| 26 | void sbsa_wdog_start(uintptr_t base, uint64_t ms); |
| 27 | void sbsa_wdog_stop(uintptr_t base); |
| Madhukar Pappireddy | 4c3de56 | 2023-03-22 15:27:22 -0500 | [diff] [blame] | 28 | void sbsa_wdog_refresh(uintptr_t refresh_base); |
| Aditya Angadi | 74514e5 | 2019-04-16 11:30:25 +0530 | [diff] [blame] | 29 | |
| 30 | #endif /* SBSA_H */ |