Grzegorz Jaszczyk | 65b9afa | 2019-04-12 16:53:49 +0200 | [diff] [blame] | 1 | /* |
| 2 | * Copyright (C) 2019 Marvell International Ltd. |
| 3 | * |
| 4 | * SPDX-License-Identifier: BSD-3-Clause |
| 5 | * https://spdx.org/licenses |
| 6 | */ |
| 7 | |
| 8 | #include <a8k_plat_def.h> |
| 9 | #include <common/debug.h> |
| 10 | #include <lib/mmio.h> |
Grzegorz Jaszczyk | 7588ae2 | 2019-04-17 11:24:43 +0200 | [diff] [blame^] | 11 | #include <mss_scp_bl2_format.h> |
Grzegorz Jaszczyk | 65b9afa | 2019-04-12 16:53:49 +0200 | [diff] [blame] | 12 | |
| 13 | /* CONFI REGISTERS */ |
| 14 | #define MG_CM3_CONFI_BASE(CP) (MVEBU_CP_REGS_BASE(CP) + 0x100000) |
Grzegorz Jaszczyk | 7588ae2 | 2019-04-17 11:24:43 +0200 | [diff] [blame^] | 15 | #define MG_CM3_SRAM_BASE(CP) MG_CM3_CONFI_BASE(CP) |
Grzegorz Jaszczyk | 65b9afa | 2019-04-12 16:53:49 +0200 | [diff] [blame] | 16 | #define MG_CM3_CONFI_GLOB_CFG_REG(CP) (MG_CM3_CONFI_BASE(CP) + 0x2B500) |
| 17 | #define CM3_CPU_EN_BIT BIT(28) |
| 18 | #define MG_CM3_MG_INT_MFX_REG(CP) (MG_CM3_CONFI_BASE(CP) + 0x2B054) |
| 19 | #define CM3_SYS_RESET_BIT BIT(0) |
| 20 | |
Grzegorz Jaszczyk | 7588ae2 | 2019-04-17 11:24:43 +0200 | [diff] [blame^] | 21 | #define MG_SRAM_SIZE 0x20000 /* 128KB */ |
| 22 | |
| 23 | int mg_image_load(uintptr_t src_addr, uint32_t size, int cp_index) |
| 24 | { |
| 25 | uintptr_t mg_regs = MG_CM3_SRAM_BASE(cp_index); |
| 26 | |
| 27 | if (size > MG_SRAM_SIZE) { |
| 28 | ERROR("image is too big to fit into MG CM3 memory\n"); |
| 29 | return 1; |
| 30 | } |
| 31 | |
| 32 | NOTICE("Loading MG image from address 0x%lx Size 0x%x to MG at 0x%lx\n", |
| 33 | src_addr, size, mg_regs); |
| 34 | |
| 35 | /* Copy image to MG CM3 SRAM */ |
| 36 | memcpy((void *)mg_regs, (void *)src_addr, size); |
| 37 | |
| 38 | /* Don't release MG CM3 from reset - it will be done by next step |
| 39 | * bootloader (e.g. U-Boot), when appriopriate device-tree setup (which |
| 40 | * has enabeld 802.3. auto-neg) will be choosen. |
| 41 | */ |
| 42 | |
| 43 | return 0; |
| 44 | } |
| 45 | |
Grzegorz Jaszczyk | 65b9afa | 2019-04-12 16:53:49 +0200 | [diff] [blame] | 46 | void mg_start_ap_fw(int cp_nr) |
| 47 | { |
| 48 | if (mmio_read_32(MG_CM3_CONFI_GLOB_CFG_REG(cp_nr)) & CM3_CPU_EN_BIT) { |
| 49 | VERBOSE("cm3 already running\n"); |
| 50 | return; /* cm3 already running */ |
| 51 | } |
| 52 | |
| 53 | mmio_setbits_32(MG_CM3_CONFI_GLOB_CFG_REG(cp_nr), CM3_CPU_EN_BIT); |
| 54 | mmio_setbits_32(MG_CM3_MG_INT_MFX_REG(cp_nr), CM3_SYS_RESET_BIT); |
| 55 | |
| 56 | /* TODO: add some routine for checking if ap process is running, if not |
| 57 | * disable cm3. |
| 58 | */ |
| 59 | } |