| developer | 0e2a284 | 2022-09-01 15:16:23 +0800 | [diff] [blame] | 1 | /* |
| 2 | * Copyright (c) 2022, MediaTek Inc. All rights reserved. |
| 3 | * |
| 4 | * SPDX-License-Identifier: BSD-3-Clause |
| 5 | */ |
| 6 | |
| 7 | #ifndef PMIC_WRAP_INIT_COMMON_H |
| 8 | #define PMIC_WRAP_INIT_COMMON_H |
| 9 | |
| 10 | #include <stdint.h> |
| 11 | |
| 12 | #include "platform_def.h" |
| 13 | |
| 14 | /* external API */ |
| 15 | int32_t pwrap_read(uint32_t adr, uint32_t *rdata); |
| 16 | int32_t pwrap_write(uint32_t adr, uint32_t wdata); |
| 17 | |
| 18 | #define GET_WACS_FSM(x) ((x >> 1) & 0x7) |
| 19 | |
| 20 | /* macro for SWINF_FSM */ |
| 21 | #define SWINF_FSM_IDLE (0x00) |
| 22 | #define SWINF_FSM_REQ (0x02) |
| 23 | #define SWINF_FSM_WFDLE (0x04) |
| 24 | #define SWINF_FSM_WFVLDCLR (0x06) |
| 25 | #define SWINF_INIT_DONE (0x01) |
| 26 | |
| 27 | /* timeout setting */ |
| 28 | #define PWRAP_READ_US (1000) |
| 29 | #define PWRAP_WAIT_IDLE_US (1000) |
| 30 | |
| 31 | /* error information flag */ |
| 32 | enum pwrap_errno { |
| 33 | E_PWR_INVALID_ARG = 1, |
| 34 | E_PWR_INVALID_RW = 2, |
| 35 | E_PWR_INVALID_ADDR = 3, |
| 36 | E_PWR_INVALID_WDAT = 4, |
| 37 | E_PWR_INVALID_OP_MANUAL = 5, |
| 38 | E_PWR_NOT_IDLE_STATE = 6, |
| 39 | E_PWR_NOT_INIT_DONE = 7, |
| 40 | E_PWR_NOT_INIT_DONE_READ = 8, |
| 41 | E_PWR_WAIT_IDLE_TIMEOUT = 9, |
| 42 | E_PWR_WAIT_IDLE_TIMEOUT_READ = 10, |
| 43 | E_PWR_INIT_SIDLY_FAIL = 11, |
| 44 | E_PWR_RESET_TIMEOUT = 12, |
| 45 | E_PWR_TIMEOUT = 13, |
| 46 | E_PWR_INIT_RESET_SPI = 20, |
| 47 | E_PWR_INIT_SIDLY = 21, |
| 48 | E_PWR_INIT_REG_CLOCK = 22, |
| 49 | E_PWR_INIT_ENABLE_PMIC = 23, |
| 50 | E_PWR_INIT_DIO = 24, |
| 51 | E_PWR_INIT_CIPHER = 25, |
| 52 | E_PWR_INIT_WRITE_TEST = 26, |
| 53 | E_PWR_INIT_ENABLE_CRC = 27, |
| 54 | E_PWR_INIT_ENABLE_DEWRAP = 28, |
| 55 | E_PWR_INIT_ENABLE_EVENT = 29, |
| 56 | E_PWR_READ_TEST_FAIL = 30, |
| 57 | E_PWR_WRITE_TEST_FAIL = 31, |
| 58 | E_PWR_SWITCH_DIO = 32, |
| 59 | }; |
| 60 | |
| 61 | #endif /* PMIC_WRAP_INIT_COMMON_H */ |