blob: e350d6ac96751912d27a814a041a97c229468c67 [file] [log] [blame]
Konstantin Porotchkinf69ec582018-06-07 18:31:14 +03001#
2# Copyright (C) 2016 - 2018 Marvell International Ltd.
3#
4# SPDX-License-Identifier: BSD-3-Clause
5# https://spdx.org/licenses
6
Konstantin Porotchkin6ff50d52018-10-07 17:54:20 +03007include tools/marvell/doimage/doimage.mk
Konstantin Porotchkinf69ec582018-06-07 18:31:14 +03008
9PLAT_FAMILY := a8k
10PLAT_FAMILY_BASE := plat/marvell/$(PLAT_FAMILY)
11PLAT_INCLUDE_BASE := include/plat/marvell/$(PLAT_FAMILY)
12PLAT_COMMON_BASE := $(PLAT_FAMILY_BASE)/common
13MARVELL_DRV_BASE := drivers/marvell
14MARVELL_COMMON_BASE := plat/marvell/common
15
Konstantin Porotchkinf51f2512018-11-06 12:25:38 +020016MARVELL_SVC_TEST := 0
17$(eval $(call add_define,MARVELL_SVC_TEST))
18
Konstantin Porotchkinf69ec582018-06-07 18:31:14 +030019ERRATA_A72_859971 := 1
20
21# Enable MSS support for a8k family
22MSS_SUPPORT := 1
23
24# Disable EL3 cache for power management
25BL31_CACHE_DISABLE := 1
26$(eval $(call add_define,BL31_CACHE_DISABLE))
27
28$(eval $(call add_define,PCI_EP_SUPPORT))
29$(eval $(call assert_boolean,PCI_EP_SUPPORT))
30
Grzegorz Jaszczyk2ed16f52018-06-29 18:00:33 +020031AP_NUM := 1
32$(eval $(call add_define,AP_NUM))
33
Konstantin Porotchkin6ff50d52018-10-07 17:54:20 +030034DOIMAGEPATH ?= tools/marvell/doimage
Konstantin Porotchkinf69ec582018-06-07 18:31:14 +030035DOIMAGETOOL ?= ${DOIMAGEPATH}/doimage
36
37ROM_BIN_EXT ?= $(BUILD_PLAT)/ble.bin
38DOIMAGE_FLAGS += -b $(ROM_BIN_EXT) $(NAND_DOIMAGE_FLAGS) $(DOIMAGE_SEC_FLAGS)
39
40# This define specifies DDR type for BLE
41$(eval $(call add_define,CONFIG_DDR4))
42
43MARVELL_GIC_SOURCES := drivers/arm/gic/common/gic_common.c \
44 drivers/arm/gic/v2/gicv2_main.c \
45 drivers/arm/gic/v2/gicv2_helpers.c \
46 plat/common/plat_gicv2.c
47
48ATF_INCLUDES := -Iinclude/common/tbbr
49
50PLAT_INCLUDES := -I$(PLAT_FAMILY_BASE)/$(PLAT) \
51 -I$(PLAT_COMMON_BASE)/include \
52 -I$(PLAT_INCLUDE_BASE)/common \
53 -Iinclude/drivers/marvell \
54 -Iinclude/drivers/marvell/mochi \
55 $(ATF_INCLUDES)
56
57PLAT_BL_COMMON_SOURCES := $(PLAT_COMMON_BASE)/aarch64/a8k_common.c \
Konstantin Porotchkinf69ec582018-06-07 18:31:14 +030058 drivers/ti/uart/aarch64/16550_console.S
59
60BLE_PORTING_SOURCES := $(PLAT_FAMILY_BASE)/$(PLAT)/board/dram_port.c \
61 $(PLAT_FAMILY_BASE)/$(PLAT)/board/marvell_plat_config.c
62
63MARVELL_MOCHI_DRV += $(MARVELL_DRV_BASE)/mochi/cp110_setup.c
64
Christine Gharzuzi9a772df2018-06-25 13:39:37 +030065BLE_SOURCES := drivers/mentor/i2c/mi2cv.c \
66 $(PLAT_COMMON_BASE)/plat_ble_setup.c \
67 $(MARVELL_MOCHI_DRV) \
68 $(PLAT_COMMON_BASE)/plat_pm.c \
69 $(MARVELL_DRV_BASE)/ap807_clocks_init.c \
70 $(MARVELL_DRV_BASE)/thermal.c \
71 $(PLAT_COMMON_BASE)/plat_thermal.c \
72 $(BLE_PORTING_SOURCES) \
73 $(MARVELL_DRV_BASE)/ccu.c \
Konstantin Porotchkinf69ec582018-06-07 18:31:14 +030074 $(MARVELL_DRV_BASE)/io_win.c
75
76BL1_SOURCES += $(PLAT_COMMON_BASE)/aarch64/plat_helpers.S \
77 lib/cpus/aarch64/cortex_a72.S
78
79MARVELL_DRV := $(MARVELL_DRV_BASE)/io_win.c \
80 $(MARVELL_DRV_BASE)/iob.c \
81 $(MARVELL_DRV_BASE)/mci.c \
82 $(MARVELL_DRV_BASE)/amb_adec.c \
83 $(MARVELL_DRV_BASE)/ccu.c \
84 $(MARVELL_DRV_BASE)/cache_llc.c \
Grzegorz Jaszczykf47d8552018-06-13 16:00:48 +020085 $(MARVELL_DRV_BASE)/comphy/phy-comphy-cp110.c \
86 $(MARVELL_DRV_BASE)/mc_trustzone/mc_trustzone.c
Konstantin Porotchkinf69ec582018-06-07 18:31:14 +030087
88BL31_PORTING_SOURCES := $(PLAT_FAMILY_BASE)/$(PLAT)/board/marvell_plat_config.c
89
90BL31_SOURCES += lib/cpus/aarch64/cortex_a72.S \
91 $(PLAT_COMMON_BASE)/aarch64/plat_helpers.S \
92 $(PLAT_COMMON_BASE)/aarch64/plat_arch_config.c \
93 $(PLAT_COMMON_BASE)/plat_pm.c \
94 $(PLAT_COMMON_BASE)/plat_bl31_setup.c \
95 $(MARVELL_COMMON_BASE)/marvell_gicv2.c \
96 $(MARVELL_COMMON_BASE)/mrvl_sip_svc.c \
97 $(MARVELL_COMMON_BASE)/marvell_ddr_info.c \
98 $(BL31_PORTING_SOURCES) \
99 $(MARVELL_DRV) \
100 $(MARVELL_MOCHI_DRV) \
101 $(MARVELL_GIC_SOURCES)
102
103# Add trace functionality for PM
104BL31_SOURCES += $(PLAT_COMMON_BASE)/plat_pm_trace.c
105
Konstantin Porotchkinf69ec582018-06-07 18:31:14 +0300106# Force builds with BL2 image on a80x0 platforms
107ifndef SCP_BL2
108 $(error "Error: SCP_BL2 image is mandatory for a8k family")
109endif
110
111# MSS (SCP) build
112include $(PLAT_COMMON_BASE)/mss/mss_a8k.mk
113
114# BLE (ROM context execution code, AKA binary extension)
Konstantin Porotchkin01851db2018-10-03 14:21:42 +0300115BLE_PATH ?= $(PLAT_COMMON_BASE)/ble
Konstantin Porotchkinf69ec582018-06-07 18:31:14 +0300116
117include ${BLE_PATH}/ble.mk
118$(eval $(call MAKE_BL,e))
119
120mrvl_flash: ${BUILD_PLAT}/${FIP_NAME} ${DOIMAGETOOL} ${BUILD_PLAT}/ble.bin
121 $(shell truncate -s %128K ${BUILD_PLAT}/bl1.bin)
122 $(shell cat ${BUILD_PLAT}/bl1.bin ${BUILD_PLAT}/${FIP_NAME} > ${BUILD_PLAT}/${BOOT_IMAGE})
123 ${DOIMAGETOOL} ${DOIMAGE_FLAGS} ${BUILD_PLAT}/${BOOT_IMAGE} ${BUILD_PLAT}/${FLASH_IMAGE}
124