| developer | 72bccc1 | 2022-06-26 21:50:32 +0800 | [diff] [blame] | 1 | # |
| 2 | # Copyright (c) 2022, MediaTek Inc. All rights reserved. |
| 3 | # |
| 4 | # SPDX-License-Identifier: BSD-3-Clause |
| 5 | # |
| 6 | |
| 7 | # indicate the reset vector address can be programmed |
| 8 | PROGRAMMABLE_RESET_ADDRESS := 1 |
| developer | 72bccc1 | 2022-06-26 21:50:32 +0800 | [diff] [blame] | 9 | COLD_BOOT_SINGLE_CPU := 1 |
| 10 | # Build flag to include AArch32 registers in cpu context save and restore during |
| 11 | # world switch. This flag must be set to 0 for AArch64-only platforms. |
| 12 | CTX_INCLUDE_AARCH32_REGS := 0 |
| 13 | PLAT_XLAT_TABLES_DYNAMIC := 1 |
| 14 | # enable this definition to print irq dump status in tf-a |
| 15 | GIC_DEBUG := 0 |
| 16 | # Enable stack protector. |
| 17 | # Allowed values are "all", "strong", "default" and "none" |
| 18 | ENABLE_STACK_PROTECTOR := strong |
| 19 | # AMU, Kernel will access amuserenr_el0 if PE supported |
| 20 | # Firmware _must_ implement AMU support |
| Andre Przywara | 0b7f1b0 | 2023-03-21 13:53:19 +0000 | [diff] [blame] | 21 | ENABLE_FEAT_AMU := 2 |
| developer | 72bccc1 | 2022-06-26 21:50:32 +0800 | [diff] [blame] | 22 | VENDOR_EXTEND_PUBEVENT_ENABLE := 1 |
| 23 | |
| 24 | # MTK define options |
| 25 | MTK_BL33_IS_64BIT := 0 |
| 26 | MTK_ADAPTED := 1 |
| 27 | |
| 28 | # MTK module config |
| 29 | CONFIG_MTK_INTERRUPT := y |
| 30 | CONFIG_MTK_UART := y |
| 31 | |
| 32 | # UART baudrate |
| 33 | UART_BAUDRATE := 921600 |