Saurabh Gorecha | 70389ca | 2020-04-22 21:31:24 +0530 | [diff] [blame^] | 1 | /* |
| 2 | * Copyright (c) 2020, The Linux Foundation. All rights reserved. |
| 3 | * |
| 4 | * SPDX-License-Identifier: BSD-3-Clause |
| 5 | */ |
| 6 | |
| 7 | #include <stdbool.h> |
| 8 | #include <stdint.h> |
| 9 | |
| 10 | #include <common/debug.h> |
| 11 | |
| 12 | #include <qtiseclib_defs.h> |
| 13 | #include <qtiseclib_interface.h> |
| 14 | |
| 15 | /* |
| 16 | * This file contains dummy implementation of QTISECLIB Published API's. |
| 17 | * which will be used to compile PLATFORM successfully when |
| 18 | * qtiseclib is not available |
| 19 | */ |
| 20 | |
| 21 | /* |
| 22 | * CPUSS common reset handler for all CPU wake up (both cold & warm boot). |
| 23 | * Executes on all core. This API assume serialization across CPU |
| 24 | * already taken care before invoking. |
| 25 | * |
| 26 | * Clobbers: x0 - x17, x30 |
| 27 | */ |
| 28 | void qtiseclib_cpuss_reset_asm(uint32_t bl31_cold_boot_state) |
| 29 | { |
| 30 | } |
| 31 | |
| 32 | /* |
| 33 | * Execute CPU (Kryo4 gold) specific reset handler / system initialization. |
| 34 | * This takes care of executing required CPU errata's. |
| 35 | * |
| 36 | * Clobbers: x0 - x16 |
| 37 | */ |
| 38 | void qtiseclib_kryo4_gold_reset_asm(void) |
| 39 | { |
| 40 | } |
| 41 | |
| 42 | /* |
| 43 | * Execute CPU (Kryo4 silver) specific reset handler / system initialization. |
| 44 | * This takes care of executing required CPU errata's. |
| 45 | * |
| 46 | * Clobbers: x0 - x16 |
| 47 | */ |
| 48 | void qtiseclib_kryo4_silver_reset_asm(void) |
| 49 | { |
| 50 | } |
| 51 | |
| 52 | /* |
| 53 | * C Api's |
| 54 | */ |
| 55 | void qtiseclib_bl31_platform_setup(void) |
| 56 | { |
| 57 | ERROR("Please use QTISECLIB_PATH while building TF-A\n"); |
| 58 | ERROR("Please refer docs/plat/qti.rst for more details.\n"); |
| 59 | panic(); |
| 60 | } |
| 61 | |
| 62 | void qtiseclib_invoke_isr(uint32_t irq, void *handle) |
| 63 | { |
| 64 | } |
| 65 | |
| 66 | void qtiseclib_panic(void) |
| 67 | { |
| 68 | } |
| 69 | |
| 70 | int qtiseclib_prng_get_data(uint8_t *out, uint32_t out_len) |
| 71 | { |
| 72 | /* fill dummy data to avoid assert and print |
| 73 | * stub implementation in setup call |
| 74 | */ |
| 75 | for (int i = 0; i < out_len; i++) { |
| 76 | out[i] = 0x11; |
| 77 | } |
| 78 | return 0; |
| 79 | } |
| 80 | |
| 81 | int |
| 82 | qtiseclib_mem_assign(const memprot_info_t *mem_info, |
| 83 | uint32_t mem_info_list_cnt, |
| 84 | const uint32_t *source_vm_list, |
| 85 | uint32_t src_vm_list_cnt, |
| 86 | const memprot_dst_vm_perm_info_t *dest_vm_list, |
| 87 | uint32_t dst_vm_list_cnt) |
| 88 | { |
| 89 | return 0; |
| 90 | } |
| 91 | |
| 92 | int qtiseclib_psci_init(uintptr_t warmboot_entry) |
| 93 | { |
| 94 | return 0; |
| 95 | } |
| 96 | |
| 97 | int qtiseclib_psci_node_power_on(u_register_t mpidr) |
| 98 | { |
| 99 | return 0; |
| 100 | } |
| 101 | |
| 102 | void qtiseclib_psci_node_on_finish(const uint8_t *states) |
| 103 | { |
| 104 | } |
| 105 | |
| 106 | void qtiseclib_psci_cpu_standby(uint8_t pwr_state) |
| 107 | { |
| 108 | } |
| 109 | |
| 110 | void qtiseclib_psci_node_power_off(const uint8_t *states) |
| 111 | { |
| 112 | } |
| 113 | |
| 114 | void qtiseclib_psci_node_suspend(const uint8_t *states) |
| 115 | { |
| 116 | } |
| 117 | |
| 118 | void qtiseclib_psci_node_suspend_finish(const uint8_t *states) |
| 119 | { |
| 120 | } |
| 121 | |
| 122 | void qtiseclib_psci_system_off(void) |
| 123 | { |
| 124 | while (1) { |
| 125 | }; |
| 126 | } |
| 127 | |
| 128 | void qtiseclib_psci_system_reset(void) |
| 129 | { |
| 130 | while (1) { |
| 131 | }; |
| 132 | } |
| 133 | |
| 134 | void qtiseclib_disable_cluster_coherency(uint8_t state) |
| 135 | { |
| 136 | } |
| 137 | |