Antonio Nino Diaz | c326c34 | 2019-01-11 11:20:10 +0000 | [diff] [blame] | 1 | /* |
Andre Przywara | bb0db3b | 2023-01-25 12:26:14 +0000 | [diff] [blame] | 2 | * Copyright (c) 2019-2023, Arm Limited. All rights reserved. |
Antonio Nino Diaz | c326c34 | 2019-01-11 11:20:10 +0000 | [diff] [blame] | 3 | * |
| 4 | * SPDX-License-Identifier: BSD-3-Clause |
| 5 | */ |
| 6 | |
| 7 | #ifndef ARCH_FEATURES_H |
| 8 | #define ARCH_FEATURES_H |
| 9 | |
| 10 | #include <stdbool.h> |
| 11 | |
| 12 | #include <arch_helpers.h> |
Andre Przywara | e8920f6 | 2022-11-10 14:28:01 +0000 | [diff] [blame] | 13 | #include <common/feat_detect.h> |
Antonio Nino Diaz | c326c34 | 2019-01-11 11:20:10 +0000 | [diff] [blame] | 14 | |
Andre Przywara | bb0db3b | 2023-01-25 12:26:14 +0000 | [diff] [blame] | 15 | #define ISOLATE_FIELD(reg, feat) \ |
| 16 | ((unsigned int)(((reg) >> (feat ## _SHIFT)) & (feat ## _MASK))) |
| 17 | |
Antonio Nino Diaz | d29d21e | 2019-02-06 09:23:04 +0000 | [diff] [blame] | 18 | static inline bool is_armv7_gentimer_present(void) |
| 19 | { |
| 20 | /* The Generic Timer is always present in an ARMv8-A implementation */ |
| 21 | return true; |
| 22 | } |
| 23 | |
Andre Przywara | 9727294 | 2023-01-26 15:27:38 +0000 | [diff] [blame] | 24 | static inline unsigned int read_feat_pan_id_field(void) |
| 25 | { |
| 26 | return ISOLATE_FIELD(read_id_aa64mmfr1_el1(), ID_AA64MMFR1_EL1_PAN); |
| 27 | } |
| 28 | |
| 29 | static inline bool is_feat_pan_supported(void) |
Daniel Boulby | 44b4333 | 2020-11-25 16:36:46 +0000 | [diff] [blame] | 30 | { |
Andre Przywara | 9727294 | 2023-01-26 15:27:38 +0000 | [diff] [blame] | 31 | if (ENABLE_FEAT_PAN == FEAT_STATE_DISABLED) { |
| 32 | return false; |
| 33 | } |
| 34 | |
| 35 | if (ENABLE_FEAT_PAN == FEAT_STATE_ALWAYS) { |
| 36 | return true; |
| 37 | } |
| 38 | |
| 39 | return read_feat_pan_id_field() != 0U; |
Daniel Boulby | 44b4333 | 2020-11-25 16:36:46 +0000 | [diff] [blame] | 40 | } |
| 41 | |
Andre Przywara | 98908b3 | 2022-11-17 16:42:09 +0000 | [diff] [blame] | 42 | static inline unsigned int read_feat_vhe_id_field(void) |
| 43 | { |
| 44 | return ISOLATE_FIELD(read_id_aa64mmfr1_el1(), ID_AA64MMFR1_EL1_VHE); |
| 45 | } |
| 46 | |
| 47 | static inline bool is_feat_vhe_supported(void) |
Daniel Boulby | 44b4333 | 2020-11-25 16:36:46 +0000 | [diff] [blame] | 48 | { |
Andre Przywara | 98908b3 | 2022-11-17 16:42:09 +0000 | [diff] [blame] | 49 | if (ENABLE_FEAT_VHE == FEAT_STATE_DISABLED) { |
| 50 | return false; |
| 51 | } |
| 52 | |
| 53 | if (ENABLE_FEAT_VHE == FEAT_STATE_ALWAYS) { |
| 54 | return true; |
| 55 | } |
| 56 | |
| 57 | return read_feat_vhe_id_field() != 0U; |
Daniel Boulby | 44b4333 | 2020-11-25 16:36:46 +0000 | [diff] [blame] | 58 | } |
| 59 | |
Antonio Nino Diaz | c326c34 | 2019-01-11 11:20:10 +0000 | [diff] [blame] | 60 | static inline bool is_armv8_2_ttcnp_present(void) |
| 61 | { |
| 62 | return ((read_id_aa64mmfr2_el1() >> ID_AA64MMFR2_EL1_CNP_SHIFT) & |
| 63 | ID_AA64MMFR2_EL1_CNP_MASK) != 0U; |
| 64 | } |
| 65 | |
Juan Pablo Conde | e089a17 | 2022-06-29 17:44:43 -0400 | [diff] [blame] | 66 | static inline bool is_feat_pacqarma3_present(void) |
| 67 | { |
| 68 | uint64_t mask_id_aa64isar2 = |
| 69 | (ID_AA64ISAR2_GPA3_MASK << ID_AA64ISAR2_GPA3_SHIFT) | |
| 70 | (ID_AA64ISAR2_APA3_MASK << ID_AA64ISAR2_APA3_SHIFT); |
| 71 | |
| 72 | /* If any of the fields is not zero, QARMA3 algorithm is present */ |
| 73 | return (read_id_aa64isar2_el1() & mask_id_aa64isar2) != 0U; |
| 74 | } |
| 75 | |
Antonio Nino Diaz | 25cda67 | 2019-02-19 11:53:51 +0000 | [diff] [blame] | 76 | static inline bool is_armv8_3_pauth_present(void) |
| 77 | { |
Juan Pablo Conde | e089a17 | 2022-06-29 17:44:43 -0400 | [diff] [blame] | 78 | uint64_t mask_id_aa64isar1 = |
| 79 | (ID_AA64ISAR1_GPI_MASK << ID_AA64ISAR1_GPI_SHIFT) | |
| 80 | (ID_AA64ISAR1_GPA_MASK << ID_AA64ISAR1_GPA_SHIFT) | |
| 81 | (ID_AA64ISAR1_API_MASK << ID_AA64ISAR1_API_SHIFT) | |
| 82 | (ID_AA64ISAR1_APA_MASK << ID_AA64ISAR1_APA_SHIFT); |
Antonio Nino Diaz | 25cda67 | 2019-02-19 11:53:51 +0000 | [diff] [blame] | 83 | |
Juan Pablo Conde | e089a17 | 2022-06-29 17:44:43 -0400 | [diff] [blame] | 84 | /* |
| 85 | * If any of the fields is not zero or QARMA3 is present, |
| 86 | * PAuth is present |
| 87 | */ |
| 88 | return ((read_id_aa64isar1_el1() & mask_id_aa64isar1) != 0U || |
| 89 | is_feat_pacqarma3_present()); |
Antonio Nino Diaz | 25cda67 | 2019-02-19 11:53:51 +0000 | [diff] [blame] | 90 | } |
| 91 | |
Daniel Boulby | 60786e7 | 2021-10-22 11:37:34 +0100 | [diff] [blame] | 92 | static inline bool is_armv8_4_dit_present(void) |
| 93 | { |
| 94 | return ((read_id_aa64pfr0_el1() >> ID_AA64PFR0_DIT_SHIFT) & |
| 95 | ID_AA64PFR0_DIT_MASK) == 1U; |
| 96 | } |
| 97 | |
Sathees Balya | 7415597 | 2019-01-25 11:36:01 +0000 | [diff] [blame] | 98 | static inline bool is_armv8_4_ttst_present(void) |
| 99 | { |
| 100 | return ((read_id_aa64mmfr2_el1() >> ID_AA64MMFR2_EL1_ST_SHIFT) & |
| 101 | ID_AA64MMFR2_EL1_ST_MASK) == 1U; |
| 102 | } |
| 103 | |
Alexei Fedorov | 90f2e88 | 2019-05-24 12:17:09 +0100 | [diff] [blame] | 104 | static inline bool is_armv8_5_bti_present(void) |
| 105 | { |
| 106 | return ((read_id_aa64pfr1_el1() >> ID_AA64PFR1_EL1_BT_SHIFT) & |
| 107 | ID_AA64PFR1_EL1_BT_MASK) == BTI_IMPLEMENTED; |
| 108 | } |
| 109 | |
Soby Mathew | 830f0ad | 2019-07-12 09:23:38 +0100 | [diff] [blame] | 110 | static inline unsigned int get_armv8_5_mte_support(void) |
| 111 | { |
| 112 | return ((read_id_aa64pfr1_el1() >> ID_AA64PFR1_EL1_MTE_SHIFT) & |
| 113 | ID_AA64PFR1_EL1_MTE_MASK); |
| 114 | } |
| 115 | |
Andre Przywara | 6dd2d06 | 2023-02-22 16:53:50 +0000 | [diff] [blame^] | 116 | static inline unsigned int read_feat_sel2_id_field(void) |
| 117 | { |
| 118 | return ISOLATE_FIELD(read_id_aa64pfr0_el1(), ID_AA64PFR0_SEL2); |
| 119 | } |
| 120 | |
| 121 | static inline bool is_feat_sel2_supported(void) |
Olivier Deprez | 2bae35f | 2020-04-16 13:39:06 +0200 | [diff] [blame] | 122 | { |
Andre Przywara | 6dd2d06 | 2023-02-22 16:53:50 +0000 | [diff] [blame^] | 123 | if (ENABLE_FEAT_SEL2 == FEAT_STATE_DISABLED) { |
| 124 | return false; |
| 125 | } |
| 126 | |
| 127 | if (ENABLE_FEAT_SEL2 == FEAT_STATE_ALWAYS) { |
| 128 | return true; |
| 129 | } |
| 130 | |
| 131 | return read_feat_sel2_id_field() != 0U; |
Olivier Deprez | 2bae35f | 2020-04-16 13:39:06 +0200 | [diff] [blame] | 132 | } |
| 133 | |
Andre Przywara | 0cf7740 | 2023-01-27 12:25:49 +0000 | [diff] [blame] | 134 | static inline unsigned int read_feat_twed_id_field(void) |
| 135 | { |
| 136 | return ISOLATE_FIELD(read_id_aa64mmfr1_el1(), ID_AA64MMFR1_EL1_TWED); |
| 137 | } |
| 138 | |
| 139 | static inline bool is_feat_twed_supported(void) |
johpow01 | 3e24c16 | 2020-04-22 14:05:13 -0500 | [diff] [blame] | 140 | { |
Andre Przywara | 0cf7740 | 2023-01-27 12:25:49 +0000 | [diff] [blame] | 141 | if (ENABLE_FEAT_TWED == FEAT_STATE_DISABLED) { |
| 142 | return false; |
| 143 | } |
| 144 | |
| 145 | if (ENABLE_FEAT_TWED == FEAT_STATE_ALWAYS) { |
| 146 | return true; |
| 147 | } |
| 148 | |
| 149 | return read_feat_twed_id_field() != 0U; |
johpow01 | 3e24c16 | 2020-04-22 14:05:13 -0500 | [diff] [blame] | 150 | } |
| 151 | |
Andre Przywara | e8920f6 | 2022-11-10 14:28:01 +0000 | [diff] [blame] | 152 | static unsigned int read_feat_fgt_id_field(void) |
Jimmy Brisson | ecc3c67 | 2020-04-16 10:47:56 -0500 | [diff] [blame] | 153 | { |
Andre Przywara | bb0db3b | 2023-01-25 12:26:14 +0000 | [diff] [blame] | 154 | return ISOLATE_FIELD(read_id_aa64mmfr0_el1(), ID_AA64MMFR0_EL1_FGT); |
Andre Przywara | e8920f6 | 2022-11-10 14:28:01 +0000 | [diff] [blame] | 155 | } |
| 156 | |
| 157 | static inline bool is_feat_fgt_supported(void) |
| 158 | { |
| 159 | if (ENABLE_FEAT_FGT == FEAT_STATE_DISABLED) { |
| 160 | return false; |
| 161 | } |
| 162 | |
| 163 | if (ENABLE_FEAT_FGT == FEAT_STATE_ALWAYS) { |
| 164 | return true; |
| 165 | } |
| 166 | |
| 167 | return read_feat_fgt_id_field() != 0U; |
Jimmy Brisson | ecc3c67 | 2020-04-16 10:47:56 -0500 | [diff] [blame] | 168 | } |
| 169 | |
Andre Przywara | c346418 | 2022-11-17 17:30:43 +0000 | [diff] [blame] | 170 | static unsigned int read_feat_ecv_id_field(void) |
| 171 | { |
| 172 | return ISOLATE_FIELD(read_id_aa64mmfr0_el1(), ID_AA64MMFR0_EL1_ECV); |
| 173 | } |
| 174 | |
| 175 | static inline bool is_feat_ecv_supported(void) |
| 176 | { |
| 177 | if (ENABLE_FEAT_ECV == FEAT_STATE_DISABLED) { |
| 178 | return false; |
| 179 | } |
| 180 | |
| 181 | if (ENABLE_FEAT_ECV == FEAT_STATE_ALWAYS) { |
| 182 | return true; |
| 183 | } |
| 184 | |
| 185 | return read_feat_ecv_id_field() != 0U; |
| 186 | } |
| 187 | |
| 188 | static inline bool is_feat_ecv_v2_supported(void) |
Jimmy Brisson | 8357389 | 2020-04-16 10:48:02 -0500 | [diff] [blame] | 189 | { |
Andre Przywara | c346418 | 2022-11-17 17:30:43 +0000 | [diff] [blame] | 190 | if (ENABLE_FEAT_ECV == FEAT_STATE_DISABLED) { |
| 191 | return false; |
| 192 | } |
| 193 | |
| 194 | if (ENABLE_FEAT_ECV == FEAT_STATE_ALWAYS) { |
| 195 | return true; |
| 196 | } |
| 197 | |
| 198 | return read_feat_ecv_id_field() >= ID_AA64MMFR0_EL1_ECV_SELF_SYNCH; |
Jimmy Brisson | 8357389 | 2020-04-16 10:48:02 -0500 | [diff] [blame] | 199 | } |
| 200 | |
Tomas Pilar | 6fd816e | 2020-10-28 15:34:12 +0000 | [diff] [blame] | 201 | static inline bool is_armv8_5_rng_present(void) |
| 202 | { |
| 203 | return ((read_id_aa64isar0_el1() >> ID_AA64ISAR0_RNDR_SHIFT) & |
| 204 | ID_AA64ISAR0_RNDR_MASK); |
| 205 | } |
| 206 | |
Mark Brown | c37eee7 | 2023-03-14 20:13:03 +0000 | [diff] [blame] | 207 | static unsigned int read_feat_tcrx_id_field(void) |
| 208 | { |
| 209 | return ISOLATE_FIELD(read_id_aa64mmfr3_el1(), ID_AA64MMFR3_EL1_TCRX); |
| 210 | } |
| 211 | |
| 212 | static inline bool is_feat_tcr2_supported(void) |
| 213 | { |
| 214 | if (ENABLE_FEAT_TCR2 == FEAT_STATE_DISABLED) { |
| 215 | return false; |
| 216 | } |
| 217 | |
| 218 | if (ENABLE_FEAT_TCR2 == FEAT_STATE_ALWAYS) { |
| 219 | return true; |
| 220 | } |
| 221 | |
| 222 | return read_feat_tcrx_id_field() != 0U; |
| 223 | } |
| 224 | |
Andre Przywara | 2c550e3 | 2022-11-10 14:41:07 +0000 | [diff] [blame] | 225 | /******************************************************************************* |
| 226 | * Functions to identify the presence of the Activity Monitors Extension |
| 227 | ******************************************************************************/ |
| 228 | static unsigned int read_feat_amu_id_field(void) |
| 229 | { |
Andre Przywara | bb0db3b | 2023-01-25 12:26:14 +0000 | [diff] [blame] | 230 | return ISOLATE_FIELD(read_id_aa64pfr0_el1(), ID_AA64PFR0_AMU); |
Andre Przywara | 2c550e3 | 2022-11-10 14:41:07 +0000 | [diff] [blame] | 231 | } |
| 232 | |
| 233 | static inline bool is_feat_amu_supported(void) |
| 234 | { |
| 235 | if (ENABLE_FEAT_AMUv1 == FEAT_STATE_DISABLED) { |
| 236 | return false; |
| 237 | } |
| 238 | |
| 239 | if (ENABLE_FEAT_AMUv1 == FEAT_STATE_ALWAYS) { |
| 240 | return true; |
| 241 | } |
| 242 | |
| 243 | return read_feat_amu_id_field() >= ID_AA64PFR0_AMU_V1; |
| 244 | } |
| 245 | |
johpow01 | fa59c6f | 2020-10-02 13:41:11 -0500 | [diff] [blame] | 246 | static inline bool is_armv8_6_feat_amuv1p1_present(void) |
| 247 | { |
Andre Przywara | 2c550e3 | 2022-11-10 14:41:07 +0000 | [diff] [blame] | 248 | return read_feat_amu_id_field() >= ID_AA64PFR0_AMU_V1P1; |
johpow01 | fa59c6f | 2020-10-02 13:41:11 -0500 | [diff] [blame] | 249 | } |
| 250 | |
Alexei Fedorov | 1993355 | 2020-05-26 13:16:41 +0100 | [diff] [blame] | 251 | /* |
| 252 | * Return MPAM version: |
| 253 | * |
| 254 | * 0x00: None Armv8.0 or later |
| 255 | * 0x01: v0.1 Armv8.4 or later |
| 256 | * 0x10: v1.0 Armv8.2 or later |
| 257 | * 0x11: v1.1 Armv8.4 or later |
| 258 | * |
| 259 | */ |
Andre Przywara | 84b8653 | 2022-11-17 16:42:09 +0000 | [diff] [blame] | 260 | static inline unsigned int read_feat_mpam_version(void) |
Alexei Fedorov | 1993355 | 2020-05-26 13:16:41 +0100 | [diff] [blame] | 261 | { |
| 262 | return (unsigned int)((((read_id_aa64pfr0_el1() >> |
| 263 | ID_AA64PFR0_MPAM_SHIFT) & ID_AA64PFR0_MPAM_MASK) << 4) | |
| 264 | ((read_id_aa64pfr1_el1() >> |
| 265 | ID_AA64PFR1_MPAM_FRAC_SHIFT) & ID_AA64PFR1_MPAM_FRAC_MASK)); |
| 266 | } |
| 267 | |
Andre Przywara | 84b8653 | 2022-11-17 16:42:09 +0000 | [diff] [blame] | 268 | static inline bool is_feat_mpam_supported(void) |
| 269 | { |
| 270 | if (ENABLE_MPAM_FOR_LOWER_ELS == FEAT_STATE_DISABLED) { |
| 271 | return false; |
| 272 | } |
| 273 | |
| 274 | if (ENABLE_MPAM_FOR_LOWER_ELS == FEAT_STATE_ALWAYS) { |
| 275 | return true; |
| 276 | } |
| 277 | |
| 278 | return read_feat_mpam_version() != 0U; |
| 279 | } |
| 280 | |
Andre Przywara | f20ad90 | 2022-11-15 11:45:19 +0000 | [diff] [blame] | 281 | static inline unsigned int read_feat_hcx_id_field(void) |
| 282 | { |
Andre Przywara | bb0db3b | 2023-01-25 12:26:14 +0000 | [diff] [blame] | 283 | return ISOLATE_FIELD(read_id_aa64mmfr1_el1(), ID_AA64MMFR1_EL1_HCX); |
Andre Przywara | f20ad90 | 2022-11-15 11:45:19 +0000 | [diff] [blame] | 284 | } |
| 285 | |
| 286 | static inline bool is_feat_hcx_supported(void) |
johpow01 | f91e59f | 2021-08-04 19:38:18 -0500 | [diff] [blame] | 287 | { |
Andre Przywara | f20ad90 | 2022-11-15 11:45:19 +0000 | [diff] [blame] | 288 | if (ENABLE_FEAT_HCX == FEAT_STATE_DISABLED) { |
| 289 | return false; |
| 290 | } |
| 291 | |
| 292 | if (ENABLE_FEAT_HCX == FEAT_STATE_ALWAYS) { |
| 293 | return true; |
| 294 | } |
| 295 | |
| 296 | return read_feat_hcx_id_field() != 0U; |
johpow01 | f91e59f | 2021-08-04 19:38:18 -0500 | [diff] [blame] | 297 | } |
| 298 | |
Juan Pablo Conde | 42305f2 | 2022-07-12 16:40:29 -0400 | [diff] [blame] | 299 | static inline bool is_feat_rng_trap_present(void) |
| 300 | { |
| 301 | return (((read_id_aa64pfr1_el1() >> ID_AA64PFR1_EL1_RNDR_TRAP_SHIFT) & |
| 302 | ID_AA64PFR1_EL1_RNDR_TRAP_MASK) |
| 303 | == ID_AA64PFR1_EL1_RNG_TRAP_SUPPORTED); |
| 304 | } |
| 305 | |
Zelalem Aweke | 79e3d29 | 2021-07-08 16:51:14 -0500 | [diff] [blame] | 306 | static inline unsigned int get_armv9_2_feat_rme_support(void) |
| 307 | { |
| 308 | /* |
| 309 | * Return the RME version, zero if not supported. This function can be |
| 310 | * used as both an integer value for the RME version or compared to zero |
| 311 | * to detect RME presence. |
| 312 | */ |
| 313 | return (unsigned int)(read_id_aa64pfr0_el1() >> |
| 314 | ID_AA64PFR0_FEAT_RME_SHIFT) & ID_AA64PFR0_FEAT_RME_MASK; |
| 315 | } |
| 316 | |
Jayanth Dodderi Chidanand | 9461a89 | 2022-01-17 18:57:17 +0000 | [diff] [blame] | 317 | /********************************************************************************* |
| 318 | * Function to identify the presence of FEAT_SB (Speculation Barrier Instruction) |
| 319 | ********************************************************************************/ |
Andre Przywara | 46880dc | 2022-11-17 16:42:09 +0000 | [diff] [blame] | 320 | static inline unsigned int read_feat_sb_id_field(void) |
Jayanth Dodderi Chidanand | 9461a89 | 2022-01-17 18:57:17 +0000 | [diff] [blame] | 321 | { |
Andre Przywara | 46880dc | 2022-11-17 16:42:09 +0000 | [diff] [blame] | 322 | return ISOLATE_FIELD(read_id_aa64isar1_el1(), ID_AA64ISAR1_SB); |
Jayanth Dodderi Chidanand | 9461a89 | 2022-01-17 18:57:17 +0000 | [diff] [blame] | 323 | } |
| 324 | |
| 325 | /********************************************************************************* |
| 326 | * Function to identify the presence of FEAT_CSV2_2 (Cache Speculation Variant 2) |
| 327 | ********************************************************************************/ |
Andre Przywara | 902c902 | 2022-11-17 17:30:43 +0000 | [diff] [blame] | 328 | static inline unsigned int read_feat_csv2_id_field(void) |
| 329 | { |
| 330 | return ISOLATE_FIELD(read_id_aa64pfr0_el1(), ID_AA64PFR0_CSV2); |
| 331 | } |
| 332 | |
| 333 | static inline bool is_feat_csv2_2_supported(void) |
Jayanth Dodderi Chidanand | 9461a89 | 2022-01-17 18:57:17 +0000 | [diff] [blame] | 334 | { |
Andre Przywara | 902c902 | 2022-11-17 17:30:43 +0000 | [diff] [blame] | 335 | if (ENABLE_FEAT_CSV2_2 == FEAT_STATE_DISABLED) { |
| 336 | return false; |
| 337 | } |
| 338 | |
| 339 | if (ENABLE_FEAT_CSV2_2 == FEAT_STATE_ALWAYS) { |
| 340 | return true; |
| 341 | } |
| 342 | |
| 343 | return read_feat_csv2_id_field() >= ID_AA64PFR0_CSV2_2_SUPPORTED; |
Jayanth Dodderi Chidanand | 9461a89 | 2022-01-17 18:57:17 +0000 | [diff] [blame] | 344 | } |
| 345 | |
| 346 | /********************************************************************************** |
| 347 | * Function to identify the presence of FEAT_SPE (Statistical Profiling Extension) |
| 348 | *********************************************************************************/ |
Andre Przywara | f3e8cfc | 2022-11-17 16:42:09 +0000 | [diff] [blame] | 349 | static inline unsigned int read_feat_spe_id_field(void) |
| 350 | { |
| 351 | return ISOLATE_FIELD(read_id_aa64dfr0_el1(), ID_AA64DFR0_PMS); |
| 352 | } |
| 353 | |
| 354 | static inline bool is_feat_spe_supported(void) |
Jayanth Dodderi Chidanand | 9461a89 | 2022-01-17 18:57:17 +0000 | [diff] [blame] | 355 | { |
Andre Przywara | f3e8cfc | 2022-11-17 16:42:09 +0000 | [diff] [blame] | 356 | if (ENABLE_SPE_FOR_NS == FEAT_STATE_DISABLED) { |
| 357 | return false; |
| 358 | } |
| 359 | |
| 360 | if (ENABLE_SPE_FOR_NS == FEAT_STATE_ALWAYS) { |
| 361 | return true; |
| 362 | } |
| 363 | |
| 364 | return read_feat_spe_id_field() != 0U; |
Jayanth Dodderi Chidanand | 9461a89 | 2022-01-17 18:57:17 +0000 | [diff] [blame] | 365 | } |
| 366 | |
| 367 | /******************************************************************************* |
| 368 | * Function to identify the presence of FEAT_SVE (Scalable Vector Extension) |
| 369 | ******************************************************************************/ |
| 370 | static inline bool is_armv8_2_feat_sve_present(void) |
| 371 | { |
| 372 | return (((read_id_aa64pfr0_el1() >> ID_AA64PFR0_SVE_SHIFT) & |
| 373 | ID_AA64PFR0_SVE_MASK) == ID_AA64PFR0_SVE_SUPPORTED); |
| 374 | } |
| 375 | |
| 376 | /******************************************************************************* |
| 377 | * Function to identify the presence of FEAT_RAS (Reliability,Availability, |
| 378 | * and Serviceability Extension) |
| 379 | ******************************************************************************/ |
| 380 | static inline bool is_armv8_2_feat_ras_present(void) |
| 381 | { |
| 382 | return (((read_id_aa64pfr0_el1() >> ID_AA64PFR0_RAS_SHIFT) & |
| 383 | ID_AA64PFR0_RAS_MASK) != ID_AA64PFR0_RAS_NOT_SUPPORTED); |
| 384 | } |
| 385 | |
| 386 | /************************************************************************** |
| 387 | * Function to identify the presence of FEAT_DIT (Data Independent Timing) |
| 388 | *************************************************************************/ |
| 389 | static inline bool is_armv8_4_feat_dit_present(void) |
| 390 | { |
| 391 | return (((read_id_aa64pfr0_el1() >> ID_AA64PFR0_DIT_SHIFT) & |
| 392 | ID_AA64PFR0_DIT_MASK) == ID_AA64PFR0_DIT_SUPPORTED); |
| 393 | } |
| 394 | |
Andre Przywara | 44e33e0 | 2022-11-17 16:42:09 +0000 | [diff] [blame] | 395 | static inline unsigned int read_feat_tracever_id_field(void) |
| 396 | { |
| 397 | return ISOLATE_FIELD(read_id_aa64dfr0_el1(), ID_AA64DFR0_TRACEVER); |
| 398 | } |
| 399 | |
| 400 | static inline bool is_feat_sys_reg_trace_supported(void) |
| 401 | { |
| 402 | if (ENABLE_SYS_REG_TRACE_FOR_NS == FEAT_STATE_DISABLED) { |
| 403 | return false; |
| 404 | } |
| 405 | |
| 406 | if (ENABLE_SYS_REG_TRACE_FOR_NS == FEAT_STATE_ALWAYS) { |
| 407 | return true; |
| 408 | } |
| 409 | |
| 410 | return read_feat_tracever_id_field() != 0U; |
| 411 | } |
| 412 | |
Jayanth Dodderi Chidanand | 9461a89 | 2022-01-17 18:57:17 +0000 | [diff] [blame] | 413 | /************************************************************************* |
| 414 | * Function to identify the presence of FEAT_TRF (TraceLift) |
| 415 | ************************************************************************/ |
Andre Przywara | 06ea44e | 2022-11-17 17:30:43 +0000 | [diff] [blame] | 416 | static inline unsigned int read_feat_trf_id_field(void) |
| 417 | { |
| 418 | return ISOLATE_FIELD(read_id_aa64dfr0_el1(), ID_AA64DFR0_TRACEFILT); |
| 419 | } |
| 420 | |
| 421 | static inline bool is_feat_trf_supported(void) |
Jayanth Dodderi Chidanand | 9461a89 | 2022-01-17 18:57:17 +0000 | [diff] [blame] | 422 | { |
Andre Przywara | 06ea44e | 2022-11-17 17:30:43 +0000 | [diff] [blame] | 423 | if (ENABLE_TRF_FOR_NS == FEAT_STATE_DISABLED) { |
| 424 | return false; |
| 425 | } |
| 426 | |
| 427 | if (ENABLE_TRF_FOR_NS == FEAT_STATE_ALWAYS) { |
| 428 | return true; |
| 429 | } |
| 430 | |
| 431 | return read_feat_trf_id_field() != 0U; |
Jayanth Dodderi Chidanand | 9461a89 | 2022-01-17 18:57:17 +0000 | [diff] [blame] | 432 | } |
| 433 | |
Jayanth Dodderi Chidanand | 9461a89 | 2022-01-17 18:57:17 +0000 | [diff] [blame] | 434 | /******************************************************************************** |
| 435 | * Function to identify the presence of FEAT_NV2 (Enhanced Nested Virtualization |
| 436 | * Support) |
| 437 | *******************************************************************************/ |
Andre Przywara | edc449d | 2023-01-27 14:09:20 +0000 | [diff] [blame] | 438 | static inline unsigned int read_feat_nv_id_field(void) |
| 439 | { |
| 440 | return ISOLATE_FIELD(read_id_aa64mmfr2_el1(), ID_AA64MMFR2_EL1_NV); |
| 441 | } |
| 442 | |
| 443 | static inline bool is_feat_nv2_supported(void) |
Jayanth Dodderi Chidanand | 9461a89 | 2022-01-17 18:57:17 +0000 | [diff] [blame] | 444 | { |
Andre Przywara | edc449d | 2023-01-27 14:09:20 +0000 | [diff] [blame] | 445 | if (CTX_INCLUDE_NEVE_REGS == FEAT_STATE_DISABLED) { |
| 446 | return false; |
| 447 | } |
| 448 | |
| 449 | if (CTX_INCLUDE_NEVE_REGS == FEAT_STATE_ALWAYS) { |
| 450 | return true; |
| 451 | } |
| 452 | |
| 453 | return read_feat_nv_id_field() >= ID_AA64MMFR2_EL1_NV2_SUPPORTED; |
Jayanth Dodderi Chidanand | 9461a89 | 2022-01-17 18:57:17 +0000 | [diff] [blame] | 454 | } |
| 455 | |
Jayanth Dodderi Chidanand | 6931675 | 2022-05-09 12:33:03 +0100 | [diff] [blame] | 456 | /******************************************************************************* |
| 457 | * Function to identify the presence of FEAT_BRBE (Branch Record Buffer |
| 458 | * Extension) |
| 459 | ******************************************************************************/ |
Andre Przywara | c97c551 | 2022-11-17 16:42:09 +0000 | [diff] [blame] | 460 | static inline unsigned int read_feat_brbe_id_field(void) |
| 461 | { |
| 462 | return ISOLATE_FIELD(read_id_aa64dfr0_el1(), ID_AA64DFR0_BRBE); |
| 463 | } |
| 464 | |
| 465 | static inline bool is_feat_brbe_supported(void) |
Jayanth Dodderi Chidanand | 6931675 | 2022-05-09 12:33:03 +0100 | [diff] [blame] | 466 | { |
Andre Przywara | c97c551 | 2022-11-17 16:42:09 +0000 | [diff] [blame] | 467 | if (ENABLE_BRBE_FOR_NS == FEAT_STATE_DISABLED) { |
| 468 | return false; |
| 469 | } |
| 470 | |
| 471 | if (ENABLE_BRBE_FOR_NS == FEAT_STATE_ALWAYS) { |
| 472 | return true; |
| 473 | } |
| 474 | |
| 475 | return read_feat_brbe_id_field() != 0U; |
Jayanth Dodderi Chidanand | 6931675 | 2022-05-09 12:33:03 +0100 | [diff] [blame] | 476 | } |
| 477 | |
Jayanth Dodderi Chidanand | a793ccc | 2022-05-19 14:08:28 +0100 | [diff] [blame] | 478 | /******************************************************************************* |
| 479 | * Function to identify the presence of FEAT_TRBE (Trace Buffer Extension) |
| 480 | ******************************************************************************/ |
Andre Przywara | 191eff6 | 2022-11-17 16:42:09 +0000 | [diff] [blame] | 481 | static inline unsigned int read_feat_trbe_id_field(void) |
Jayanth Dodderi Chidanand | a793ccc | 2022-05-19 14:08:28 +0100 | [diff] [blame] | 482 | { |
Andre Przywara | 191eff6 | 2022-11-17 16:42:09 +0000 | [diff] [blame] | 483 | return ISOLATE_FIELD(read_id_aa64dfr0_el1(), ID_AA64DFR0_TRACEBUFFER); |
Jayanth Dodderi Chidanand | a793ccc | 2022-05-19 14:08:28 +0100 | [diff] [blame] | 484 | } |
Jayanth Dodderi Chidanand | 6931675 | 2022-05-09 12:33:03 +0100 | [diff] [blame] | 485 | |
Andre Przywara | 191eff6 | 2022-11-17 16:42:09 +0000 | [diff] [blame] | 486 | static inline bool is_feat_trbe_supported(void) |
| 487 | { |
| 488 | if (ENABLE_TRBE_FOR_NS == FEAT_STATE_DISABLED) { |
| 489 | return false; |
| 490 | } |
| 491 | |
| 492 | if (ENABLE_TRBE_FOR_NS == FEAT_STATE_ALWAYS) { |
| 493 | return true; |
| 494 | } |
| 495 | |
| 496 | return read_feat_trbe_id_field() != 0U; |
| 497 | |
| 498 | } |
Antonio Nino Diaz | c326c34 | 2019-01-11 11:20:10 +0000 | [diff] [blame] | 499 | #endif /* ARCH_FEATURES_H */ |