Soren Brinkmann | 76fcae3 | 2016-03-06 20:16:27 -0800 | [diff] [blame] | 1 | /* |
| 2 | * Copyright (c) 2013-2016, ARM Limited and Contributors. All rights reserved. |
| 3 | * |
| 4 | * Redistribution and use in source and binary forms, with or without |
| 5 | * modification, are permitted provided that the following conditions are met: |
| 6 | * |
| 7 | * Redistributions of source code must retain the above copyright notice, this |
| 8 | * list of conditions and the following disclaimer. |
| 9 | * |
| 10 | * Redistributions in binary form must reproduce the above copyright notice, |
| 11 | * this list of conditions and the following disclaimer in the documentation |
| 12 | * and/or other materials provided with the distribution. |
| 13 | * |
| 14 | * Neither the name of ARM nor the names of its contributors may be used |
| 15 | * to endorse or promote products derived from this software without specific |
| 16 | * prior written permission. |
| 17 | * |
| 18 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
| 19 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
| 20 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE |
| 21 | * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE |
| 22 | * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR |
| 23 | * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF |
| 24 | * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS |
| 25 | * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN |
| 26 | * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) |
| 27 | * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE |
| 28 | * POSSIBILITY OF SUCH DAMAGE. |
| 29 | */ |
| 30 | |
| 31 | #include <assert.h> |
| 32 | #include <bl_common.h> |
| 33 | #include <bl31.h> |
| 34 | #include <console.h> |
| 35 | #include <debug.h> |
| 36 | #include <errno.h> |
| 37 | #include <plat_arm.h> |
| 38 | #include <platform.h> |
| 39 | #include "zynqmp_private.h" |
| 40 | |
| 41 | /* |
| 42 | * Declarations of linker defined symbols which will help us find the layout |
| 43 | * of trusted SRAM |
| 44 | */ |
| 45 | extern unsigned long __RO_START__; |
| 46 | extern unsigned long __RO_END__; |
| 47 | |
| 48 | extern unsigned long __COHERENT_RAM_START__; |
| 49 | extern unsigned long __COHERENT_RAM_END__; |
| 50 | |
| 51 | /* |
| 52 | * The next 2 constants identify the extents of the code & RO data region. |
| 53 | * These addresses are used by the MMU setup code and therefore they must be |
| 54 | * page-aligned. It is the responsibility of the linker script to ensure that |
| 55 | * __RO_START__ and __RO_END__ linker symbols refer to page-aligned addresses. |
| 56 | */ |
| 57 | #define BL31_RO_BASE (unsigned long)(&__RO_START__) |
| 58 | #define BL31_RO_LIMIT (unsigned long)(&__RO_END__) |
| 59 | |
| 60 | /* |
| 61 | * The next 2 constants identify the extents of the coherent memory region. |
| 62 | * These addresses are used by the MMU setup code and therefore they must be |
| 63 | * page-aligned. It is the responsibility of the linker script to ensure that |
| 64 | * __COHERENT_RAM_START__ and __COHERENT_RAM_END__ linker symbols |
| 65 | * refer to page-aligned addresses. |
| 66 | */ |
| 67 | #define BL31_COHERENT_RAM_BASE (unsigned long)(&__COHERENT_RAM_START__) |
| 68 | #define BL31_COHERENT_RAM_LIMIT (unsigned long)(&__COHERENT_RAM_END__) |
| 69 | |
| 70 | static entry_point_info_t bl32_image_ep_info; |
| 71 | static entry_point_info_t bl33_image_ep_info; |
| 72 | |
| 73 | /* |
| 74 | * Return a pointer to the 'entry_point_info' structure of the next image for |
| 75 | * the security state specified. BL33 corresponds to the non-secure image type |
| 76 | * while BL32 corresponds to the secure image type. A NULL pointer is returned |
| 77 | * if the image does not exist. |
| 78 | */ |
| 79 | entry_point_info_t *bl31_plat_get_next_image_ep_info(uint32_t type) |
| 80 | { |
| 81 | assert(sec_state_is_valid(type)); |
| 82 | |
| 83 | if (type == NON_SECURE) |
| 84 | return &bl33_image_ep_info; |
| 85 | |
| 86 | return &bl32_image_ep_info; |
| 87 | } |
| 88 | |
| 89 | /* |
| 90 | * Perform any BL31 specific platform actions. Here is an opportunity to copy |
| 91 | * parameters passed by the calling EL (S-EL1 in BL2 & S-EL3 in BL1) before they |
| 92 | * are lost (potentially). This needs to be done before the MMU is initialized |
| 93 | * so that the memory layout can be used while creating page tables. |
| 94 | */ |
| 95 | void bl31_early_platform_setup(bl31_params_t *from_bl2, |
| 96 | void *plat_params_from_bl2) |
| 97 | { |
| 98 | /* Initialize the console to provide early debug support */ |
Soren Brinkmann | 99c0d7b | 2016-06-10 09:57:14 -0700 | [diff] [blame] | 99 | console_init(ZYNQMP_UART_BASE, zynqmp_get_uart_clk(), |
Soren Brinkmann | 76fcae3 | 2016-03-06 20:16:27 -0800 | [diff] [blame] | 100 | ZYNQMP_UART_BAUDRATE); |
| 101 | |
| 102 | /* Initialize the platform config for future decision making */ |
| 103 | zynqmp_config_setup(); |
| 104 | |
| 105 | /* There are no parameters from BL2 if BL31 is a reset vector */ |
| 106 | assert(from_bl2 == NULL); |
| 107 | assert(plat_params_from_bl2 == NULL); |
| 108 | |
| 109 | /* |
| 110 | * Do initial security configuration to allow DRAM/device access. On |
| 111 | * Base ZYNQMP only DRAM security is programmable (via TrustZone), but |
| 112 | * other platforms might have more programmable security devices |
| 113 | * present. |
| 114 | */ |
| 115 | |
Michal Simek | ef8f559 | 2015-06-15 14:22:50 +0200 | [diff] [blame] | 116 | /* Populate common information for BL32 and BL33 */ |
Soren Brinkmann | 76fcae3 | 2016-03-06 20:16:27 -0800 | [diff] [blame] | 117 | SET_PARAM_HEAD(&bl32_image_ep_info, PARAM_EP, VERSION_1, 0); |
| 118 | SET_SECURITY_STATE(bl32_image_ep_info.h.attr, SECURE); |
Soren Brinkmann | 76fcae3 | 2016-03-06 20:16:27 -0800 | [diff] [blame] | 119 | SET_PARAM_HEAD(&bl33_image_ep_info, PARAM_EP, VERSION_1, 0); |
Soren Brinkmann | 76fcae3 | 2016-03-06 20:16:27 -0800 | [diff] [blame] | 120 | SET_SECURITY_STATE(bl33_image_ep_info.h.attr, NON_SECURE); |
| 121 | |
Michal Simek | ef8f559 | 2015-06-15 14:22:50 +0200 | [diff] [blame] | 122 | if (zynqmp_get_bootmode() == ZYNQMP_BOOTMODE_JTAG) { |
| 123 | /* use build time defaults in JTAG boot mode */ |
| 124 | bl32_image_ep_info.pc = BL32_BASE; |
| 125 | bl32_image_ep_info.spsr = arm_get_spsr_for_bl32_entry(); |
| 126 | bl33_image_ep_info.pc = plat_get_ns_image_entrypoint(); |
| 127 | bl33_image_ep_info.spsr = SPSR_64(MODE_EL2, MODE_SP_ELX, |
| 128 | DISABLE_ALL_EXCEPTIONS); |
| 129 | } else { |
| 130 | /* use parameters from FSBL */ |
| 131 | fsbl_atf_handover(&bl32_image_ep_info, &bl33_image_ep_info); |
| 132 | } |
| 133 | |
| 134 | NOTICE("BL31: Secure code at 0x%lx\n", bl32_image_ep_info.pc); |
Soren Brinkmann | 76fcae3 | 2016-03-06 20:16:27 -0800 | [diff] [blame] | 135 | NOTICE("BL31: Non secure code at 0x%lx\n", bl33_image_ep_info.pc); |
| 136 | } |
| 137 | |
| 138 | void bl31_platform_setup(void) |
| 139 | { |
| 140 | /* Initialize the gic cpu and distributor interfaces */ |
| 141 | plat_arm_gic_driver_init(); |
| 142 | plat_arm_gic_init(); |
| 143 | } |
| 144 | |
| 145 | void bl31_plat_runtime_setup(void) |
| 146 | { |
| 147 | } |
| 148 | |
| 149 | /* |
Sandrine Bailleux | 4a1267a | 2016-05-18 16:11:47 +0100 | [diff] [blame] | 150 | * Perform the very early platform specific architectural setup here. |
Soren Brinkmann | 76fcae3 | 2016-03-06 20:16:27 -0800 | [diff] [blame] | 151 | */ |
| 152 | void bl31_plat_arch_setup(void) |
| 153 | { |
| 154 | plat_arm_interconnect_init(); |
| 155 | plat_arm_interconnect_enter_coherency(); |
| 156 | |
Sandrine Bailleux | 4a1267a | 2016-05-18 16:11:47 +0100 | [diff] [blame] | 157 | arm_setup_page_tables(BL31_RO_BASE, |
Soren Brinkmann | 76fcae3 | 2016-03-06 20:16:27 -0800 | [diff] [blame] | 158 | BL31_COHERENT_RAM_LIMIT - BL31_RO_BASE, |
| 159 | BL31_RO_BASE, |
| 160 | BL31_RO_LIMIT, |
| 161 | BL31_COHERENT_RAM_BASE, |
| 162 | BL31_COHERENT_RAM_LIMIT); |
Sandrine Bailleux | 4a1267a | 2016-05-18 16:11:47 +0100 | [diff] [blame] | 163 | enable_mmu_el3(0); |
Soren Brinkmann | 76fcae3 | 2016-03-06 20:16:27 -0800 | [diff] [blame] | 164 | } |