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git01.mediatek.com / filogic / atf / 6aba3b1914af9a8fecf73f02d7919b8f04b6b6c1 / . / plat / rockchip / rk3288 / platform.mk
blob: e6f78cfb8b47a4ffc7008b0fe25b2070a7bef4c1 [file] [log] [blame]
Heiko Stuebner87b9a3c2019-03-14 22:12:04 +0100[diff] [blame]1#
Juan Pablo Conde6aba3b12023-08-09 13:19:21 -0500[diff] [blame^]2# Copyright (c) 2016-2023, Arm Limited and Contributors. All rights reserved.
Heiko Stuebner87b9a3c2019-03-14 22:12:04 +0100[diff] [blame]3#
4# SPDX-License-Identifier: BSD-3-Clause
5#
6
Heiko Stuebner6892dc32021-02-08 15:44:27 +0100[diff] [blame]7include drivers/arm/gic/v2/gicv2.mk
8
Heiko Stuebner87b9a3c2019-03-14 22:12:04 +0100[diff] [blame]9ARM_CORTEX_A12 := yes
10ARM_ARCH_MAJOR := 7
11
12RK_PLAT := plat/rockchip
13RK_PLAT_SOC := ${RK_PLAT}/${PLAT}
14RK_PLAT_COMMON := ${RK_PLAT}/common
15
Christoph Müllner05ceda72019-04-24 09:52:54 +0200[diff] [blame]16DISABLE_BIN_GENERATION := 1
17
Heiko Stuebner87b9a3c2019-03-14 22:12:04 +0100[diff] [blame]18PLAT_INCLUDES := -I${RK_PLAT_COMMON}/ \
19 -I${RK_PLAT_COMMON}/include/ \
20 -I${RK_PLAT_COMMON}/aarch32/ \
21 -I${RK_PLAT_COMMON}/drivers/pmu/ \
22 -I${RK_PLAT_SOC}/ \
23 -I${RK_PLAT_SOC}/drivers/pmu/ \
24 -I${RK_PLAT_SOC}/drivers/secure/ \
25 -I${RK_PLAT_SOC}/drivers/soc/ \
26 -I${RK_PLAT_SOC}/include/ \
27 -I${RK_PLAT_SOC}/include/shared/ \
28
Heiko Stuebner6892dc32021-02-08 15:44:27 +0100[diff] [blame]29RK_GIC_SOURCES := ${GICV2_SOURCES} \
Heiko Stuebner87b9a3c2019-03-14 22:12:04 +0100[diff] [blame]30 plat/common/plat_gicv2.c \
31 ${RK_PLAT}/common/rockchip_gicv2.c
32
Julius Wernerf1d230c2019-05-30 16:57:15 -0700[diff] [blame]33PLAT_BL_COMMON_SOURCES := common/desc_image_load.c \
34 lib/bl_aux_params/bl_aux_params.c \
Julius Werner65d52672019-05-24 20:37:58 -0700[diff] [blame]35 plat/common/aarch32/crash_console_helpers.S \
Heiko Stuebner87b9a3c2019-03-14 22:12:04 +0100[diff] [blame]36 plat/common/plat_psci_common.c
37
38PLAT_BL_COMMON_SOURCES += lib/xlat_tables/xlat_tables_common.c \
39 lib/xlat_tables/aarch32/xlat_tables.c
40
41BL32_SOURCES += ${RK_GIC_SOURCES} \
42 drivers/arm/cci/cci.c \
43 drivers/ti/uart/aarch32/16550_console.S \
44 drivers/delay_timer/delay_timer.c \
45 drivers/delay_timer/generic_delay_timer.c \
46 lib/cpus/aarch32/cortex_a12.S \
Heiko Stuebner87b9a3c2019-03-14 22:12:04 +0100[diff] [blame]47 ${RK_PLAT_COMMON}/aarch32/plat_helpers.S \
48 ${RK_PLAT_COMMON}/params_setup.c \
49 ${RK_PLAT_COMMON}/aarch32/pmu_sram_cpus_on.S \
50 ${RK_PLAT_COMMON}/plat_pm.c \
51 ${RK_PLAT_COMMON}/plat_topology.c \
52 ${RK_PLAT_COMMON}/aarch32/platform_common.c \
53 ${RK_PLAT_COMMON}/rockchip_sip_svc.c \
54 ${RK_PLAT_SOC}/plat_sip_calls.c \
55 ${RK_PLAT_SOC}/drivers/pmu/pmu.c \
56 ${RK_PLAT_SOC}/drivers/secure/secure.c \
57 ${RK_PLAT_SOC}/drivers/soc/soc.c \
58
59MULTI_CONSOLE_API := 1
60
61include lib/coreboot/coreboot.mk
Heiko Stuebner6fd5b942019-04-24 20:26:51 +0200[diff] [blame]62include lib/libfdt/libfdt.mk
Heiko Stuebner87b9a3c2019-03-14 22:12:04 +0100[diff] [blame]63
64$(eval $(call add_define,PLAT_SP_MIN_EXTRA_LD_SCRIPT))
65
66# Do not enable SVE
67ENABLE_SVE_FOR_NS := 0
68
69WORKAROUND_CVE_2017_5715 := 0
Juan Pablo Conde6aba3b12023-08-09 13:19:21 -0500[diff] [blame^]70
71ifeq (${AARCH32_SP}, none)
72 $(error Variable AARCH32_SP has to be set for AArch32)
73endif