Marc Bonnici | 25f4b54 | 2022-04-12 17:18:13 +0100 | [diff] [blame] | 1 | /* |
Nishant Sharma | a3ddb3b | 2022-04-28 14:28:44 +0100 | [diff] [blame] | 2 | * Copyright (c) 2022-2023, ARM Limited and Contributors. All rights reserved. |
Marc Bonnici | 25f4b54 | 2022-04-12 17:18:13 +0100 | [diff] [blame] | 3 | * |
| 4 | * SPDX-License-Identifier: BSD-3-Clause |
| 5 | */ |
| 6 | |
| 7 | #include <assert.h> |
| 8 | #include <errno.h> |
| 9 | |
| 10 | #include <lib/el3_runtime/context_mgmt.h> |
| 11 | #include <lib/spinlock.h> |
| 12 | #include <plat/common/common_def.h> |
| 13 | #include <plat/common/platform.h> |
| 14 | #include <services/ffa_svc.h> |
| 15 | #include "spmc.h" |
| 16 | |
| 17 | #include <platform_def.h> |
| 18 | |
| 19 | /******************************************************************************* |
| 20 | * spmc_build_pm_message |
| 21 | * |
| 22 | * Builds an SPMC to SP direct message request. |
| 23 | ******************************************************************************/ |
| 24 | static void spmc_build_pm_message(gp_regs_t *gpregs, |
| 25 | unsigned long long message, |
| 26 | uint8_t pm_msg_type, |
| 27 | uint16_t sp_id) |
| 28 | { |
| 29 | write_ctx_reg(gpregs, CTX_GPREG_X0, FFA_MSG_SEND_DIRECT_REQ_SMC32); |
| 30 | write_ctx_reg(gpregs, CTX_GPREG_X1, |
| 31 | (FFA_SPMC_ID << FFA_DIRECT_MSG_SOURCE_SHIFT) | |
| 32 | sp_id); |
| 33 | write_ctx_reg(gpregs, CTX_GPREG_X2, FFA_FWK_MSG_BIT | |
| 34 | (pm_msg_type & FFA_FWK_MSG_MASK)); |
| 35 | write_ctx_reg(gpregs, CTX_GPREG_X3, message); |
| 36 | } |
| 37 | |
| 38 | /******************************************************************************* |
Nishant Sharma | a3ddb3b | 2022-04-28 14:28:44 +0100 | [diff] [blame] | 39 | * This CPU has been turned on. Enter the SP to initialise S-EL0 or S-EL1. |
Marc Bonnici | 25f4b54 | 2022-04-12 17:18:13 +0100 | [diff] [blame] | 40 | ******************************************************************************/ |
| 41 | static void spmc_cpu_on_finish_handler(u_register_t unused) |
| 42 | { |
| 43 | struct secure_partition_desc *sp = spmc_get_current_sp_ctx(); |
| 44 | struct sp_exec_ctx *ec; |
| 45 | unsigned int linear_id = plat_my_core_pos(); |
| 46 | entry_point_info_t sec_ec_ep_info = {0}; |
| 47 | uint64_t rc; |
| 48 | |
| 49 | /* Sanity check for a NULL pointer dereference. */ |
| 50 | assert(sp != NULL); |
| 51 | |
Nishant Sharma | a3ddb3b | 2022-04-28 14:28:44 +0100 | [diff] [blame] | 52 | /* Obtain a reference to the SP execution context */ |
| 53 | ec = &sp->ec[get_ec_index(sp)]; |
| 54 | |
| 55 | /* |
| 56 | * In case of a S-EL0 SP, only initialise the context data structure for |
| 57 | * the secure world on this cpu and return. |
| 58 | */ |
| 59 | if (sp->runtime_el == S_EL0) { |
| 60 | /* Assign the context of the SP to this CPU */ |
| 61 | cm_set_context(&(ec->cpu_ctx), SECURE); |
| 62 | return; |
| 63 | } |
| 64 | |
Marc Bonnici | 25f4b54 | 2022-04-12 17:18:13 +0100 | [diff] [blame] | 65 | /* Initialize entry point information for the SP. */ |
| 66 | SET_PARAM_HEAD(&sec_ec_ep_info, PARAM_EP, VERSION_1, |
| 67 | SECURE | EP_ST_ENABLE); |
| 68 | |
| 69 | /* |
| 70 | * Check if the primary execution context registered an entry point else |
| 71 | * bail out early. |
| 72 | * TODO: Add support for boot reason in manifest to allow jumping to |
| 73 | * entrypoint into the primary execution context. |
| 74 | */ |
| 75 | if (sp->secondary_ep == 0) { |
| 76 | WARN("%s: No secondary ep on core%u\n", __func__, linear_id); |
| 77 | return; |
| 78 | } |
| 79 | |
| 80 | sec_ec_ep_info.pc = sp->secondary_ep; |
| 81 | |
| 82 | /* |
| 83 | * Setup and initialise the SP execution context on this physical cpu. |
| 84 | */ |
| 85 | spmc_el1_sp_setup(sp, &sec_ec_ep_info); |
| 86 | spmc_sp_common_ep_commit(sp, &sec_ec_ep_info); |
| 87 | |
| 88 | /* Obtain a reference to the SP execution context. */ |
| 89 | ec = spmc_get_sp_ec(sp); |
| 90 | |
| 91 | /* |
| 92 | * TODO: Should we do some PM related state tracking of the SP execution |
| 93 | * context here? |
| 94 | */ |
| 95 | |
| 96 | /* Update the runtime model and state of the partition. */ |
| 97 | ec->rt_model = RT_MODEL_INIT; |
| 98 | ec->rt_state = RT_STATE_RUNNING; |
Marc Bonnici | a939594 | 2022-11-15 11:15:48 +0000 | [diff] [blame] | 99 | ec->dir_req_origin_id = INV_SP_ID; |
Marc Bonnici | 25f4b54 | 2022-04-12 17:18:13 +0100 | [diff] [blame] | 100 | |
| 101 | INFO("SP (0x%x) init start on core%u.\n", sp->sp_id, linear_id); |
| 102 | |
| 103 | rc = spmc_sp_synchronous_entry(ec); |
| 104 | if (rc != 0ULL) { |
| 105 | ERROR("%s failed (%lu) on CPU%u\n", __func__, rc, linear_id); |
| 106 | } |
| 107 | |
| 108 | /* Update the runtime state of the partition. */ |
| 109 | ec->rt_state = RT_STATE_WAITING; |
| 110 | |
| 111 | VERBOSE("CPU %u on!\n", linear_id); |
| 112 | } |
| 113 | /******************************************************************************* |
| 114 | * Helper function to send a FF-A power management message to an SP. |
| 115 | ******************************************************************************/ |
| 116 | static int32_t spmc_send_pm_msg(uint8_t pm_msg_type, |
| 117 | unsigned long long psci_event) |
| 118 | { |
| 119 | struct secure_partition_desc *sp = spmc_get_current_sp_ctx(); |
| 120 | struct sp_exec_ctx *ec; |
| 121 | gp_regs_t *gpregs_ctx; |
| 122 | unsigned int linear_id = plat_my_core_pos(); |
| 123 | u_register_t resp; |
| 124 | uint64_t rc; |
| 125 | |
| 126 | /* Obtain a reference to the SP execution context. */ |
| 127 | ec = spmc_get_sp_ec(sp); |
| 128 | |
| 129 | /* |
| 130 | * TODO: Should we do some PM related state tracking of the SP execution |
| 131 | * context here? |
| 132 | */ |
| 133 | |
| 134 | /* |
| 135 | * Build an SPMC to SP direct message request. |
| 136 | * Note that x4-x6 should be populated with the original PSCI arguments. |
| 137 | */ |
| 138 | spmc_build_pm_message(get_gpregs_ctx(&ec->cpu_ctx), |
| 139 | psci_event, |
| 140 | pm_msg_type, |
| 141 | sp->sp_id); |
| 142 | |
| 143 | /* Sanity check partition state. */ |
| 144 | assert(ec->rt_state == RT_STATE_WAITING); |
| 145 | |
| 146 | /* Update the runtime model and state of the partition. */ |
| 147 | ec->rt_model = RT_MODEL_DIR_REQ; |
| 148 | ec->rt_state = RT_STATE_RUNNING; |
Marc Bonnici | a939594 | 2022-11-15 11:15:48 +0000 | [diff] [blame] | 149 | ec->dir_req_origin_id = FFA_SPMC_ID; |
Marc Bonnici | 25f4b54 | 2022-04-12 17:18:13 +0100 | [diff] [blame] | 150 | |
| 151 | rc = spmc_sp_synchronous_entry(ec); |
| 152 | if (rc != 0ULL) { |
| 153 | ERROR("%s failed (%lu) on CPU%u.\n", __func__, rc, linear_id); |
| 154 | assert(false); |
| 155 | return -EINVAL; |
| 156 | } |
| 157 | |
| 158 | /* |
| 159 | * Validate we receive an expected response from the SP. |
| 160 | * TODO: We don't currently support aborting an SP in the scenario |
| 161 | * where it is misbehaving so assert these conditions are not |
| 162 | * met for now. |
| 163 | */ |
| 164 | gpregs_ctx = get_gpregs_ctx(&ec->cpu_ctx); |
| 165 | |
| 166 | /* Expect a direct message response from the SP. */ |
| 167 | resp = read_ctx_reg(gpregs_ctx, CTX_GPREG_X0); |
| 168 | if (resp != FFA_MSG_SEND_DIRECT_RESP_SMC32) { |
| 169 | ERROR("%s invalid SP response (%lx).\n", __func__, resp); |
| 170 | assert(false); |
| 171 | return -EINVAL; |
| 172 | } |
| 173 | |
| 174 | /* Ensure the sender and receiver are populated correctly. */ |
| 175 | resp = read_ctx_reg(gpregs_ctx, CTX_GPREG_X1); |
| 176 | if (!(ffa_endpoint_source(resp) == sp->sp_id && |
| 177 | ffa_endpoint_destination(resp) == FFA_SPMC_ID)) { |
| 178 | ERROR("%s invalid src/dst response (%lx).\n", __func__, resp); |
| 179 | assert(false); |
| 180 | return -EINVAL; |
| 181 | } |
| 182 | |
| 183 | /* Expect a PM message response from the SP. */ |
| 184 | resp = read_ctx_reg(gpregs_ctx, CTX_GPREG_X2); |
| 185 | if ((resp & FFA_FWK_MSG_BIT) == 0U || |
| 186 | ((resp & FFA_FWK_MSG_MASK) != FFA_PM_MSG_PM_RESP)) { |
| 187 | ERROR("%s invalid PM response (%lx).\n", __func__, resp); |
| 188 | assert(false); |
| 189 | return -EINVAL; |
| 190 | } |
| 191 | |
| 192 | /* Update the runtime state of the partition. */ |
| 193 | ec->rt_state = RT_STATE_WAITING; |
| 194 | |
| 195 | /* Return the status code returned by the SP */ |
| 196 | return read_ctx_reg(gpregs_ctx, CTX_GPREG_X3); |
| 197 | } |
| 198 | |
| 199 | /******************************************************************************* |
| 200 | * spmc_cpu_suspend_finish_handler |
| 201 | ******************************************************************************/ |
| 202 | static void spmc_cpu_suspend_finish_handler(u_register_t unused) |
| 203 | { |
| 204 | struct secure_partition_desc *sp = spmc_get_current_sp_ctx(); |
| 205 | unsigned int linear_id = plat_my_core_pos(); |
| 206 | int32_t rc; |
| 207 | |
| 208 | /* Sanity check for a NULL pointer dereference. */ |
| 209 | assert(sp != NULL); |
| 210 | |
| 211 | /* |
| 212 | * Check if the SP has subscribed for this power management message. |
| 213 | * If not then we don't have anything else to do here. |
| 214 | */ |
| 215 | if ((sp->pwr_mgmt_msgs & FFA_PM_MSG_SUB_CPU_SUSPEND_RESUME) == 0U) { |
| 216 | goto exit; |
| 217 | } |
| 218 | |
| 219 | rc = spmc_send_pm_msg(FFA_PM_MSG_WB_REQ, FFA_WB_TYPE_NOTS2RAM); |
| 220 | if (rc < 0) { |
| 221 | ERROR("%s failed (%d) on CPU%u\n", __func__, rc, linear_id); |
| 222 | return; |
| 223 | } |
| 224 | |
| 225 | exit: |
| 226 | VERBOSE("CPU %u resumed!\n", linear_id); |
| 227 | } |
| 228 | |
| 229 | /******************************************************************************* |
| 230 | * spmc_cpu_suspend_handler |
| 231 | ******************************************************************************/ |
| 232 | static void spmc_cpu_suspend_handler(u_register_t unused) |
| 233 | { |
| 234 | struct secure_partition_desc *sp = spmc_get_current_sp_ctx(); |
| 235 | unsigned int linear_id = plat_my_core_pos(); |
| 236 | int32_t rc; |
| 237 | |
| 238 | /* Sanity check for a NULL pointer dereference. */ |
| 239 | assert(sp != NULL); |
| 240 | |
| 241 | /* |
| 242 | * Check if the SP has subscribed for this power management message. |
| 243 | * If not then we don't have anything else to do here. |
| 244 | */ |
| 245 | if ((sp->pwr_mgmt_msgs & FFA_PM_MSG_SUB_CPU_SUSPEND) == 0U) { |
| 246 | goto exit; |
| 247 | } |
| 248 | |
| 249 | rc = spmc_send_pm_msg(FFA_FWK_MSG_PSCI, PSCI_CPU_SUSPEND_AARCH64); |
| 250 | if (rc < 0) { |
| 251 | ERROR("%s failed (%d) on CPU%u\n", __func__, rc, linear_id); |
| 252 | return; |
| 253 | } |
| 254 | exit: |
| 255 | VERBOSE("CPU %u suspend!\n", linear_id); |
| 256 | } |
| 257 | |
| 258 | /******************************************************************************* |
| 259 | * spmc_cpu_off_handler |
| 260 | ******************************************************************************/ |
| 261 | static int32_t spmc_cpu_off_handler(u_register_t unused) |
| 262 | { |
| 263 | struct secure_partition_desc *sp = spmc_get_current_sp_ctx(); |
| 264 | unsigned int linear_id = plat_my_core_pos(); |
| 265 | int32_t ret = 0; |
| 266 | |
| 267 | /* Sanity check for a NULL pointer dereference. */ |
| 268 | assert(sp != NULL); |
| 269 | |
| 270 | /* |
| 271 | * Check if the SP has subscribed for this power management message. |
| 272 | * If not then we don't have anything else to do here. |
| 273 | */ |
| 274 | if ((sp->pwr_mgmt_msgs & FFA_PM_MSG_SUB_CPU_OFF) == 0U) { |
| 275 | goto exit; |
| 276 | } |
| 277 | |
| 278 | ret = spmc_send_pm_msg(FFA_FWK_MSG_PSCI, PSCI_CPU_OFF); |
| 279 | if (ret < 0) { |
| 280 | ERROR("%s failed (%d) on CPU%u\n", __func__, ret, linear_id); |
| 281 | return ret; |
| 282 | } |
| 283 | |
| 284 | exit: |
| 285 | VERBOSE("CPU %u off!\n", linear_id); |
| 286 | return ret; |
| 287 | } |
| 288 | |
| 289 | /******************************************************************************* |
| 290 | * Structure populated by the SPM Core to perform any bookkeeping before |
| 291 | * PSCI executes a power mgmt. operation. |
| 292 | ******************************************************************************/ |
| 293 | const spd_pm_ops_t spmc_pm = { |
| 294 | .svc_on_finish = spmc_cpu_on_finish_handler, |
| 295 | .svc_off = spmc_cpu_off_handler, |
| 296 | .svc_suspend = spmc_cpu_suspend_handler, |
| 297 | .svc_suspend_finish = spmc_cpu_suspend_finish_handler |
| 298 | }; |