Hadi Asyrafi | 616da77 | 2019-06-27 11:34:03 +0800 | [diff] [blame] | 1 | /* |
| 2 | * Copyright (c) 2019, Intel Corporation. All rights reserved. |
| 3 | * |
| 4 | * SPDX-License-Identifier: BSD-3-Clause |
| 5 | */ |
| 6 | |
Hadi Asyrafi | 6f8a2b2 | 2019-10-23 18:34:14 +0800 | [diff] [blame] | 7 | #ifndef SOCFPGA_MBOX_H |
| 8 | #define SOCFPGA_MBOX_H |
Hadi Asyrafi | 616da77 | 2019-06-27 11:34:03 +0800 | [diff] [blame] | 9 | |
Ambroise Vincent | a724e43 | 2019-07-23 11:10:27 +0100 | [diff] [blame] | 10 | #include <lib/utils_def.h> |
| 11 | |
Hadi Asyrafi | 616da77 | 2019-06-27 11:34:03 +0800 | [diff] [blame] | 12 | #define MBOX_OFFSET 0xffa30000 |
| 13 | |
Tien Hock, Loh | 527234a | 2019-10-30 14:54:25 +0800 | [diff] [blame] | 14 | #define MBOX_MAX_JOB_ID 0xf |
Hadi Asyrafi | 616da77 | 2019-06-27 11:34:03 +0800 | [diff] [blame] | 15 | #define MBOX_ATF_CLIENT_ID 0x1 |
| 16 | #define MBOX_JOB_ID 0x1 |
| 17 | |
| 18 | /* Mailbox interrupt flags and masks */ |
| 19 | #define MBOX_INT_FLAG_COE 0x1 |
| 20 | #define MBOX_INT_FLAG_RIE 0x2 |
| 21 | #define MBOX_INT_FLAG_UAE 0x100 |
| 22 | #define MBOX_COE_BIT(INTERRUPT) ((INTERRUPT) & 0x3) |
| 23 | #define MBOX_UAE_BIT(INTERRUPT) (((INTERRUPT) & (1<<8))) |
| 24 | |
| 25 | /* Mailbox response and status */ |
| 26 | #define MBOX_RESP_BUFFER_SIZE 16 |
| 27 | #define MBOX_RESP_ERR(BUFFER) ((BUFFER) & 0x00000fff) |
| 28 | #define MBOX_RESP_LEN(BUFFER) (((BUFFER) & 0x007ff000) >> 12) |
| 29 | #define MBOX_RESP_CLIENT_ID(BUFFER) (((BUFFER) & 0xf0000000) >> 28) |
| 30 | #define MBOX_RESP_JOB_ID(BUFFER) (((BUFFER) & 0x0f000000) >> 24) |
| 31 | #define MBOX_STATUS_UA_MASK (1<<8) |
| 32 | |
| 33 | /* Mailbox command and response */ |
| 34 | #define MBOX_CMD_FREE_OFFSET 0x14 |
| 35 | #define MBOX_CMD_BUFFER_SIZE 32 |
| 36 | #define MBOX_CLIENT_ID_CMD(CLIENT_ID) ((CLIENT_ID) << 28) |
| 37 | #define MBOX_JOB_ID_CMD(JOB_ID) (JOB_ID<<24) |
| 38 | #define MBOX_CMD_LEN_CMD(CMD_LEN) ((CMD_LEN) << 12) |
| 39 | #define MBOX_INDIRECT (1 << 11) |
| 40 | #define MBOX_INSUFFICIENT_BUFFER -2 |
| 41 | #define MBOX_CIN 0x00 |
| 42 | #define MBOX_ROUT 0x04 |
| 43 | #define MBOX_URG 0x08 |
| 44 | #define MBOX_INT 0x0C |
| 45 | #define MBOX_COUT 0x20 |
| 46 | #define MBOX_RIN 0x24 |
| 47 | #define MBOX_STATUS 0x2C |
| 48 | #define MBOX_CMD_BUFFER 0x40 |
| 49 | #define MBOX_RESP_BUFFER 0xC0 |
| 50 | |
| 51 | #define MBOX_RESP_BUFFER_SIZE 16 |
| 52 | #define MBOX_RESP_OK 0 |
| 53 | #define MBOX_RESP_INVALID_CMD 1 |
| 54 | #define MBOX_RESP_UNKNOWN_BR 2 |
| 55 | #define MBOX_RESP_UNKNOWN 3 |
| 56 | #define MBOX_RESP_NOT_CONFIGURED 256 |
| 57 | |
| 58 | /* Mailbox SDM doorbell */ |
| 59 | #define MBOX_DOORBELL_TO_SDM 0x400 |
| 60 | #define MBOX_DOORBELL_FROM_SDM 0x480 |
| 61 | |
| 62 | /* Mailbox QSPI commands */ |
| 63 | #define MBOX_CMD_RESTART 2 |
| 64 | #define MBOX_CMD_QSPI_OPEN 50 |
| 65 | #define MBOX_CMD_QSPI_CLOSE 51 |
| 66 | #define MBOX_CMD_QSPI_DIRECT 59 |
| 67 | #define MBOX_CMD_GET_IDCODE 16 |
| 68 | #define MBOX_CMD_QSPI_SET_CS 52 |
| 69 | |
Tien Hock, Loh | 527234a | 2019-10-30 14:54:25 +0800 | [diff] [blame] | 70 | /* Mailbox CANCEL command */ |
| 71 | #define MBOX_CMD_CANCEL 0x3 |
| 72 | |
Hadi Asyrafi | 616da77 | 2019-06-27 11:34:03 +0800 | [diff] [blame] | 73 | /* Mailbox REBOOT commands */ |
| 74 | #define MBOX_CMD_REBOOT_HPS 71 |
| 75 | |
Hadi Asyrafi | 593c4c5 | 2019-12-17 19:22:17 +0800 | [diff] [blame] | 76 | /* Mailbox RSU commands */ |
| 77 | #define MBOX_GET_SUBPARTITION_TABLE 90 |
| 78 | #define MBOX_RSU_STATUS 91 |
| 79 | #define MBOX_RSU_UPDATE 92 |
| 80 | |
| 81 | /* Mailbox RSU macros */ |
| 82 | #define RSU_VERSION_ACMF BIT(8) |
| 83 | #define RSU_VERSION_ACMF_MASK 0xff00 |
| 84 | |
| 85 | /* HPS stage notify command */ |
| 86 | #define MBOX_HPS_STAGE_NOTIFY 93 |
| 87 | |
| 88 | /* Execution states for HPS_STAGE_NOTIFY */ |
| 89 | #define HPS_EXECUTION_STATE_FSBL 0 |
| 90 | #define HPS_EXECUTION_STATE_SSBL 1 |
| 91 | #define HPS_EXECUTION_STATE_OS 2 |
| 92 | |
| 93 | /* Mailbox reconfiguration commands */ |
| 94 | #define MBOX_CONFIG_STATUS 4 |
| 95 | #define MBOX_RECONFIG 6 |
| 96 | #define MBOX_RECONFIG_DATA 8 |
| 97 | #define MBOX_RECONFIG_STATUS 9 |
| 98 | |
Hadi Asyrafi | 616da77 | 2019-06-27 11:34:03 +0800 | [diff] [blame] | 99 | /* Generic error handling */ |
| 100 | #define MBOX_TIMEOUT -2047 |
| 101 | #define MBOX_NO_RESPONSE -2 |
| 102 | #define MBOX_WRONG_ID -3 |
| 103 | |
| 104 | /* Mailbox status */ |
Hadi Asyrafi | 2b9198d | 2019-11-12 15:03:00 +0800 | [diff] [blame] | 105 | #define RECONFIG_STATUS_STATE 0 |
| 106 | #define RECONFIG_STATUS_PIN_STATUS 2 |
| 107 | #define RECONFIG_STATUS_SOFTFUNC_STATUS 3 |
| 108 | #define PIN_STATUS_NSTATUS (U(1) << 31) |
| 109 | #define SOFTFUNC_STATUS_SEU_ERROR (1 << 3) |
| 110 | #define SOFTFUNC_STATUS_INIT_DONE (1 << 1) |
| 111 | #define SOFTFUNC_STATUS_CONF_DONE (1 << 0) |
| 112 | #define MBOX_CFGSTAT_STATE_IDLE 0x00000000 |
| 113 | #define MBOX_CFGSTAT_STATE_CONFIG 0x10000000 |
| 114 | #define MBOX_CFGSTAT_STATE_FAILACK 0x08000000 |
| 115 | #define MBOX_CFGSTAT_STATE_ERROR_INVALID 0xf0000001 |
| 116 | #define MBOX_CFGSTAT_STATE_ERROR_CORRUPT 0xf0000002 |
| 117 | #define MBOX_CFGSTAT_STATE_ERROR_AUTH 0xf0000003 |
| 118 | #define MBOX_CFGSTAT_STATE_ERROR_CORE_IO 0xf0000004 |
| 119 | #define MBOX_CFGSTAT_STATE_ERROR_HARDWARE 0xf0000005 |
| 120 | #define MBOX_CFGSTAT_STATE_ERROR_FAKE 0xf0000006 |
| 121 | #define MBOX_CFGSTAT_STATE_ERROR_BOOT_INFO 0xf0000007 |
| 122 | #define MBOX_CFGSTAT_STATE_ERROR_QSPI_ERROR 0xf0000008 |
Hadi Asyrafi | 616da77 | 2019-06-27 11:34:03 +0800 | [diff] [blame] | 123 | |
Hadi Asyrafi | 616da77 | 2019-06-27 11:34:03 +0800 | [diff] [blame] | 124 | void mailbox_set_int(int interrupt_input); |
| 125 | int mailbox_init(void); |
| 126 | void mailbox_set_qspi_close(void); |
| 127 | void mailbox_set_qspi_open(void); |
| 128 | void mailbox_set_qspi_direct(void); |
Abdul Halim, Muhammad Hadi Asyrafi | d84bfef | 2020-02-25 16:28:10 +0800 | [diff] [blame] | 129 | int mailbox_send_cmd(int job_id, unsigned int cmd, uint32_t *args, |
Hadi Asyrafi | 9dfc047 | 2019-11-12 16:39:46 +0800 | [diff] [blame] | 130 | int len, int urgent, uint32_t *response, int resp_len); |
Abdul Halim, Muhammad Hadi Asyrafi | d84bfef | 2020-02-25 16:28:10 +0800 | [diff] [blame] | 131 | int mailbox_send_cmd_async(int job_id, unsigned int cmd, uint32_t *args, |
Hadi Asyrafi | 616da77 | 2019-06-27 11:34:03 +0800 | [diff] [blame] | 132 | int len, int urgent); |
Hadi Asyrafi | 9dfc047 | 2019-11-12 16:39:46 +0800 | [diff] [blame] | 133 | int mailbox_read_response(int job_id, uint32_t *response, int resp_len); |
Hadi Asyrafi | 616da77 | 2019-06-27 11:34:03 +0800 | [diff] [blame] | 134 | int mailbox_get_qspi_clock(void); |
| 135 | void mailbox_reset_cold(void); |
Tien Hock, Loh | 527234a | 2019-10-30 14:54:25 +0800 | [diff] [blame] | 136 | void mailbox_clear_response(void); |
| 137 | |
Abdul Halim, Muhammad Hadi Asyrafi | e59b999 | 2020-02-11 20:17:05 +0800 | [diff] [blame] | 138 | int intel_mailbox_get_config_status(uint32_t cmd); |
Hadi Asyrafi | 6aeb55d | 2019-12-24 14:43:22 +0800 | [diff] [blame] | 139 | int intel_mailbox_is_fpga_not_ready(void); |
Hadi Asyrafi | 616da77 | 2019-06-27 11:34:03 +0800 | [diff] [blame] | 140 | |
Hadi Asyrafi | 593c4c5 | 2019-12-17 19:22:17 +0800 | [diff] [blame] | 141 | int mailbox_rsu_get_spt_offset(uint32_t *resp_buf, uint32_t resp_buf_len); |
| 142 | int mailbox_rsu_status(uint32_t *resp_buf, uint32_t resp_buf_len); |
Abdul Halim, Muhammad Hadi Asyrafi | d84bfef | 2020-02-25 16:28:10 +0800 | [diff] [blame] | 143 | int mailbox_rsu_update(uint32_t *flash_offset); |
| 144 | int mailbox_hps_stage_notify(uint32_t execution_stage); |
Hadi Asyrafi | 593c4c5 | 2019-12-17 19:22:17 +0800 | [diff] [blame] | 145 | |
Hadi Asyrafi | 6f8a2b2 | 2019-10-23 18:34:14 +0800 | [diff] [blame] | 146 | #endif /* SOCFPGA_MBOX_H */ |