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Dan Handley610e7e12018-03-01 18:44:00 +00001Trusted Firmware-A maintainers
2==============================
Douglas Raillardd7c21b72017-06-28 15:23:03 +01003
Dan Handley610e7e12018-03-01 18:44:00 +00004Trusted Firmware-A (TF-A) is an Arm maintained project. All contributions are
Douglas Raillardd7c21b72017-06-28 15:23:03 +01005ultimately merged by the maintainers listed below. Technical ownership of some
6parts of the codebase is delegated to the sub-maintainers listed below. An
7acknowledgement from these sub-maintainers may be required before the
8maintainers merge a contribution.
9
Antonio Nino Diaz21a05e12018-06-25 19:06:49 +010010Main maintainers
11----------------
12:M: Dan Handley <dan.handley@arm.com>
13:G: `danh-arm`_
14:M: Dimitris Papastamos <dimitrs.papastamos@arm.com>
15:G: `dp-arm`_
16:M: Soby Mathew <soby.mathew@arm.com>
17:G: `soby-mathew`_
Douglas Raillardd7c21b72017-06-28 15:23:03 +010018
Antonio Nino Diaz21a05e12018-06-25 19:06:49 +010019Allwinner ARMv8 platform port
20-----------------------------
21:M: Andre Przywara <andre.przywara@arm.com>
22:G: `Andre-ARM`_
Andre Przywara5d16ece2018-06-28 23:49:39 +010023:M: Samuel Holland <samuel@sholland.org>
24:G: `smaeul`_
Antonio Nino Diaz21a05e12018-06-25 19:06:49 +010025:F: docs/plat/allwinner.rst
26:F: plat/allwinner/
Douglas Raillardd7c21b72017-06-28 15:23:03 +010027
Antonio Nino Diaz21a05e12018-06-25 19:06:49 +010028Armv7-A architecture port
29-------------------------
30:M: Etienne Carriere <etienne.carriere@linaro.org>
31:G: `etienne-lms`_
Douglas Raillardd7c21b72017-06-28 15:23:03 +010032
Antonio Nino Diaz21a05e12018-06-25 19:06:49 +010033eMMC/UFS drivers
34----------------
35:M: Haojian Zhuang <haojian.zhuang@linaro.org>
36:G: `hzhuang1`_
37:F: drivers/emmc/
38:F: drivers/partition/
39:F: drivers/synopsys/emmc/
40:F: drivers/synopsys/ufs/
41:F: drivers/ufs/
42:F: include/drivers/dw_ufs.h
43:F: include/drivers/emmc.h
44:F: include/drivers/ufs.h
45:F: include/drivers/synopsys/dw_mmc.h
Douglas Raillardd7c21b72017-06-28 15:23:03 +010046
Antonio Nino Diaz21a05e12018-06-25 19:06:49 +010047HiSilicon HiKey and HiKey960 platform ports
48-------------------------------------------
49:M: Haojian Zhuang <haojian.zhuang@linaro.org>
50:G: `hzhuang1`_
51:F: docs/plat/hikey.rst
52:F: docs/plat/hikey960.rst
53:F: plat/hisilicon/hikey/
54:F: plat/hisilicon/hikey960/
Douglas Raillardd7c21b72017-06-28 15:23:03 +010055
Antonio Nino Diaz21a05e12018-06-25 19:06:49 +010056HiSilicon Poplar platform port
57------------------------------
58:M: Shawn Guo <shawn.guo@linaro.org>
59:G: `shawnguo2`_
60:F: docs/plat/poplar.rst
61:F: plat/hisilicon/poplar/
Nishanth Menon0192f892016-10-14 01:13:34 +000062
Antonio Nino Diaz21a05e12018-06-25 19:06:49 +010063MediaTek platform ports
64-----------------------
65:M: Yidi Lin (林以廸) <yidi.lin@mediatek.com>
66:G: `mtk09422`_
67:F: plat/mediatek/
Nishanth Menon0192f892016-10-14 01:13:34 +000068
Antonio Nino Diaz21a05e12018-06-25 19:06:49 +010069NVidia platform ports
70---------------------
71:M: Varun Wadekar <vwadekar@nvidia.com>
72:G: `vwadekar`_
73:F: docs/plat/nvidia-tegra.rst
74:F: include/lib/cpus/aarch64/denver.h
75:F: lib/cpus/aarch64/denver.S
76:F: plat/nvidia/
Nishanth Menon0192f892016-10-14 01:13:34 +000077
Antonio Nino Diaz21a05e12018-06-25 19:06:49 +010078NXP QorIQ Layerscape platform ports
79-----------------------------------
80:M: Jiafei Pan <jiafei.pan@nxp.com>
81:G: `qoriq-open-source`_
82:F: docs/plat/ls1043a.rst
83:F: plat/layerscape/
Nishanth Menon0192f892016-10-14 01:13:34 +000084
Antonio Nino Diaz21a05e12018-06-25 19:06:49 +010085NXP i.MX 8 platform port
86------------------------
87:M: Anson Huang <Anson.Huang@nxp.com>
88:G: `Anson-Huang`_
89:F: docs/plat/imx8.rst
90:F: plat/imx/
Dan Handley70c5d7b2017-12-06 10:13:17 +000091
Antonio Nino Diaz21a05e12018-06-25 19:06:49 +010092OP-TEE dispatcher
93-----------------
94:M: Jens Wiklander <jens.wiklander@linaro.org>
95:G: `jenswi-linaro`_
96:F: docs/spd/optee-dispatcher.rst
97:F: services/spd/opteed/
Dan Handley70c5d7b2017-12-06 10:13:17 +000098
Antonio Nino Diaz21a05e12018-06-25 19:06:49 +010099QEMU platform port
100------------------
101:M: Jens Wiklander <jens.wiklander@linaro.org>
102:G: `jenswi-linaro`_
103:F: docs/plat/qemu.rst
104:F: plat/qemu/
Dan Handley70c5d7b2017-12-06 10:13:17 +0000105
Antonio Nino Diaz21a05e12018-06-25 19:06:49 +0100106Raspberry Pi 3 platform port
107----------------------------
108:M: Antonio Niño Díaz <antonio.ninodiaz@arm.com>
109:G: `antonio-nino-diaz-arm`_
110:F: docs/plat/rpi3.rst
111:F: plat/rpi3/
Dan Handley70c5d7b2017-12-06 10:13:17 +0000112
Antonio Nino Diaz21a05e12018-06-25 19:06:49 +0100113RockChip platform port
114----------------------
115:M: Tony Xie <tony.xie@rock-chips.com>
116:G: `TonyXie06`_
117:G: `rockchip-linux`_
118:F: plat/rockchip/
Douglas Raillardd7c21b72017-06-28 15:23:03 +0100119
Antonio Nino Diaz21a05e12018-06-25 19:06:49 +0100120Synquacer platform port
121-----------------------
122:M: Sumit Garg <sumit.garg@linaro.org>
123:G: `b49020`_
124:F: docs/plat/synquacer.rst
125:F: plat/socionext/synquacer/
Douglas Raillardd7c21b72017-06-28 15:23:03 +0100126
Antonio Nino Diaz21a05e12018-06-25 19:06:49 +0100127Texas Instruments platform port
128-------------------------------
129:M: Andrew F. Davis <afd@ti.com>
130:G: `glneo`_
131:F: docs/plat/ti-k3.rst
132:F: plat/ti/
Douglas Raillardd7c21b72017-06-28 15:23:03 +0100133
Antonio Nino Diaz21a05e12018-06-25 19:06:49 +0100134TLK/Trusty secure payloads
135--------------------------
136:M: Varun Wadekar <vwadekar@nvidia.com>
137:G: `vwadekar`_
138:F: docs/spd/tlk-dispatcher.rst
139:F: docs/spd/trusty-dispatcher.rst
140:F: include/bl32/payloads/tlk.h
141:F: services/spd/tlkd/
142:F: services/spd/trusty/
Douglas Raillardd7c21b72017-06-28 15:23:03 +0100143
Antonio Nino Diaz21a05e12018-06-25 19:06:49 +0100144UniPhier platform port
145----------------------
146:M: Masahiro Yamada <yamada.masahiro@socionext.com>
147:G: `masahir0y`_
148:F: docs/plat/socionext-uniphier.rst
149:F: plat/socionext/uniphier/
Etienne Carriere1374fcb2017-11-08 13:48:40 +0100150
Antonio Nino Diaz21a05e12018-06-25 19:06:49 +0100151Xilinx platform port
152--------------------
153:M: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
154:G: `sivadur`_
155:F: docs/plat/xilinx-zynqmp.rst
156:F: plat/xilinx/
Etienne Carriere1374fcb2017-11-08 13:48:40 +0100157
Antonio Nino Diaz21a05e12018-06-25 19:06:49 +0100158.. _Andre-ARM: https://github.com/Andre-ARM
159.. _Anson-Huang: https://github.com/Anson-Huang
Antonio Nino Diazae6779e2017-11-06 14:49:04 +0000160.. _antonio-nino-diaz-arm: https://github.com/antonio-nino-diaz-arm
Antonio Nino Diaz21a05e12018-06-25 19:06:49 +0100161.. _b49020: https://github.com/b49020
Douglas Raillardd7c21b72017-06-28 15:23:03 +0100162.. _danh-arm: https://github.com/danh-arm
Antonio Nino Diaz21a05e12018-06-25 19:06:49 +0100163.. _dp-arm: https://github.com/dp-arm
164.. _etienne-lms: https://github.com/etienne-lms
165.. _glneo: https://github.com/glneo
Douglas Raillardd7c21b72017-06-28 15:23:03 +0100166.. _hzhuang1: https://github.com/hzhuang1
Antonio Nino Diaz21a05e12018-06-25 19:06:49 +0100167.. _jenswi-linaro: https://github.com/jenswi-linaro
Dan Handley70c5d7b2017-12-06 10:13:17 +0000168.. _masahir0y: https://github.com/masahir0y
Douglas Raillardd7c21b72017-06-28 15:23:03 +0100169.. _mtk09422: https://github.com/mtk09422
Jiafei Pan46367ad2018-03-02 07:23:30 +0000170.. _qoriq-open-source: https://github.com/qoriq-open-source
Antonio Nino Diaz21a05e12018-06-25 19:06:49 +0100171.. _rockchip-linux: https://github.com/rockchip-linux
172.. _shawnguo2: https://github.com/shawnguo2
173.. _sivadur: https://github.com/sivadur
174.. _soby-mathew: https://github.com/soby-mathew
175.. _TonyXie06: https://github.com/TonyXie06
176.. _vwadekar: https://github.com/vwadekar