| Konstantin Porotchkin | f69ec58 | 2018-06-07 18:31:14 +0300 | [diff] [blame] | 1 | /* |
| 2 | * Copyright (C) 2017 Marvell International Ltd. |
| 3 | * |
| 4 | * SPDX-License-Identifier: BSD-3-Clause |
| 5 | * https://spdx.org/licenses |
| 6 | */ |
| 7 | #ifndef _ARO_H_ |
| 8 | #define _ARO_H_ |
| 9 | |
| 10 | enum hws_freq { |
| 11 | CPU_FREQ_2000, |
| 12 | CPU_FREQ_1800, |
| 13 | CPU_FREQ_1600, |
| 14 | CPU_FREQ_1400, |
| 15 | CPU_FREQ_1300, |
| 16 | CPU_FREQ_1200, |
| 17 | CPU_FREQ_1000, |
| 18 | CPU_FREQ_600, |
| 19 | CPU_FREQ_800, |
| 20 | DDR_FREQ_LAST, |
| 21 | DDR_FREQ_SAR |
| 22 | }; |
| 23 | |
| 24 | enum cpu_clock_freq_mode { |
| 25 | CPU_2000_DDR_1200_RCLK_1200 = 0x0, |
| 26 | CPU_2000_DDR_1050_RCLK_1050 = 0x1, |
| 27 | CPU_1600_DDR_800_RCLK_800 = 0x4, |
| 28 | CPU_1800_DDR_1200_RCLK_1200 = 0x6, |
| 29 | CPU_1800_DDR_1050_RCLK_1050 = 0x7, |
| 30 | CPU_1600_DDR_900_RCLK_900 = 0x0B, |
| 31 | CPU_1600_DDR_1050_RCLK_1050 = 0x0D, |
| 32 | CPU_1600_DDR_900_RCLK_900_2 = 0x0E, |
| 33 | CPU_1000_DDR_650_RCLK_650 = 0x13, |
| 34 | CPU_1300_DDR_800_RCLK_800 = 0x14, |
| 35 | CPU_1300_DDR_650_RCLK_650 = 0x17, |
| 36 | CPU_1200_DDR_800_RCLK_800 = 0x19, |
| 37 | CPU_1400_DDR_800_RCLK_800 = 0x1a, |
| 38 | CPU_600_DDR_800_RCLK_800 = 0x1B, |
| 39 | CPU_800_DDR_800_RCLK_800 = 0x1C, |
| 40 | CPU_1000_DDR_800_RCLK_800 = 0x1D, |
| 41 | CPU_DDR_RCLK_INVALID |
| 42 | }; |
| 43 | |
| 44 | int init_aro(void); |
| 45 | |
| 46 | #endif /* _ARO_H_ */ |