blob: 0688b71b4c2440717644cea26c0057556969d471 [file] [log] [blame]
developer65149572022-09-07 18:26:57 +08001/*
2 * Copyright (c) 2023, MediaTek Inc. All rights reserved.
3 *
4 * SPDX-License-Identifier: BSD-3-Clause
5 */
6
7#ifndef MT_SPM_H
8#define MT_SPM_H
9
10#include <stdint.h>
11#include <stdio.h>
12#include <lib/spinlock.h>
13#include <lib/pm/mtk_pm.h>
14#include <lpm/mt_lp_rq.h>
15
16/*
17 * ARM v8.2, the cache will turn off automatically when cpu
18 * power down. Therefore, there is no doubt to use the spin_lock here.
19 */
20extern spinlock_t spm_lock;
21
22#ifdef __GNUC__
23#define spm_likely(x) __builtin_expect(!!(x), 1)
24#define spm_unlikely(x) __builtin_expect(!!(x), 0)
25#else
26#define spm_likely(x) (x)
27#define spm_unlikely(x) (x)
28#endif
29
30#define MT_SPM_USING_SRCLKEN_RC
31/* spm extern operand definition */
32#define MT_SPM_EX_OP_CLR_26M_RECORD BIT(0)
33#define MT_SPM_EX_OP_SET_WDT BIT(1)
34#define MT_SPM_EX_OP_NON_GENERIC_RESOURCE_REQ BIT(2)
35#define MT_SPM_EX_OP_SET_SUSPEND_MODE BIT(3)
36#define MT_SPM_EX_OP_SET_IS_ADSP BIT(4)
37#define MT_SPM_EX_OP_SRCLKEN_RC_BBLPM BIT(5)
38#define MT_SPM_EX_OP_HW_S1_DETECT BIT(6)
39#define MT_SPM_EX_OP_TRACE_LP BIT(7)
40#define MT_SPM_EX_OP_TRACE_SUSPEND BIT(8)
41#define MT_SPM_EX_OP_TRACE_TIMESTAMP_EN BIT(9)
42#define MT_SPM_EX_OP_TIME_CHECK BIT(10)
43#define MT_SPM_EX_OP_TIME_OBS BIT(11)
44#define MT_SPM_EX_OP_PERI_ON BIT(12)
45#define MT_SPM_EX_OP_INFRA_ON BIT(13)
46
47typedef enum {
48 WR_NONE = 0,
49 WR_UART_BUSY = 1,
50 WR_ABORT = 2,
51 WR_PCM_TIMER = 3,
52 WR_WAKE_SRC = 4,
53 WR_DVFSRC = 5,
54 WR_TWAM = 6,
55 WR_PMSR = 7,
56 WR_SPM_ACK_CHK = 8,
57 WR_UNKNOWN = 9,
58} wake_reason_t;
59
60struct mt_lp_resource_user *get_spm_res_user(void);
61int spm_boot_init(void);
62
63#endif /* MT_SPM_H */