Andre Przywara | ffbacb0 | 2019-07-10 17:27:17 +0100 | [diff] [blame] | 1 | /* |
Javier Almansa Sobrino | 40f4984 | 2020-08-25 16:16:29 +0100 | [diff] [blame] | 2 | * Copyright (c) 2019-2020, ARM Limited and Contributors. All rights reserved. |
Andre Przywara | ffbacb0 | 2019-07-10 17:27:17 +0100 | [diff] [blame] | 3 | * |
| 4 | * SPDX-License-Identifier: BSD-3-Clause |
| 5 | */ |
| 6 | |
| 7 | #ifndef FDT_FIXUP_H |
| 8 | #define FDT_FIXUP_H |
| 9 | |
Andre Przywara | f2a78fe | 2021-05-19 09:37:21 +0100 | [diff] [blame] | 10 | #define INVALID_BASE_ADDR ((uintptr_t)~0UL) |
| 11 | |
Andre Przywara | ffbacb0 | 2019-07-10 17:27:17 +0100 | [diff] [blame] | 12 | int dt_add_psci_node(void *fdt); |
| 13 | int dt_add_psci_cpu_enable_methods(void *fdt); |
Andre Przywara | 83fc839 | 2019-07-15 09:00:23 +0100 | [diff] [blame] | 14 | int fdt_add_reserved_memory(void *dtb, const char *node_name, |
| 15 | uintptr_t base, size_t size); |
Javier Almansa Sobrino | 40f4984 | 2020-08-25 16:16:29 +0100 | [diff] [blame] | 16 | int fdt_add_cpus_node(void *dtb, unsigned int afflv0, |
| 17 | unsigned int afflv1, unsigned int afflv2); |
Andre Przywara | f2a78fe | 2021-05-19 09:37:21 +0100 | [diff] [blame] | 18 | int fdt_adjust_gic_redist(void *dtb, unsigned int nr_cores, uintptr_t gicr_base, |
Andre Przywara | 64b9e14 | 2020-08-24 18:28:44 +0100 | [diff] [blame] | 19 | unsigned int gicr_frame_size); |
Andre Przywara | ffbacb0 | 2019-07-10 17:27:17 +0100 | [diff] [blame] | 20 | |
| 21 | #endif /* FDT_FIXUP_H */ |