blob: d7e3536dbc0d64cd5e30c5455259b8be30eaa0a3 [file] [log] [blame]
Alexei Fedorov84f1b5d2020-03-23 18:45:17 +00001#
2# Copyright (c) 2013-2020, Arm Limited and Contributors. All rights reserved.
Varun Wadekareea6dc12021-05-04 16:14:09 -07003# Copyright (c) 2021, NVIDIA Corporation. All rights reserved.
Alexei Fedorov84f1b5d2020-03-23 18:45:17 +00004#
5# SPDX-License-Identifier: BSD-3-Clause
6#
7
8# Default configuration values
Andre Przywarae1cc1302020-03-25 15:50:38 +00009GICV3_SUPPORT_GIC600 ?= 0
Varun Wadekareea6dc12021-05-04 16:14:09 -070010GICV3_SUPPORT_GIC600AE_FMU ?= 0
Alexei Fedorov84f1b5d2020-03-23 18:45:17 +000011GICV3_IMPL_GIC600_MULTICHIP ?= 0
12GICV3_OVERRIDE_DISTIF_PWR_OPS ?= 0
Alexei Fedorov19705932020-04-06 19:00:35 +010013GIC_ENABLE_V4_EXTN ?= 0
Alexei Fedorova6e6ae02020-04-06 16:27:54 +010014GIC_EXT_INTID ?= 0
Alexei Fedorov84f1b5d2020-03-23 18:45:17 +000015
Alexei Fedorova6e6ae02020-04-06 16:27:54 +010016GICV3_SOURCES += drivers/arm/gic/v3/gicv3_main.c \
Alexei Fedorov84f1b5d2020-03-23 18:45:17 +000017 drivers/arm/gic/v3/gicv3_helpers.c \
18 drivers/arm/gic/v3/gicdv3_helpers.c \
19 drivers/arm/gic/v3/gicrv3_helpers.c
20
Varun Wadekareea6dc12021-05-04 16:14:09 -070021ifeq (${GICV3_SUPPORT_GIC600AE_FMU}, 1)
22GICV3_SOURCES += drivers/arm/gic/v3/gic600ae_fmu.c \
23 drivers/arm/gic/v3/gic600ae_fmu_helpers.c
24endif
25
Alexei Fedorov84f1b5d2020-03-23 18:45:17 +000026ifeq (${GICV3_OVERRIDE_DISTIF_PWR_OPS}, 0)
27GICV3_SOURCES += drivers/arm/gic/v3/arm_gicv3_common.c
28endif
29
Andre Przywarae1cc1302020-03-25 15:50:38 +000030GICV3_SOURCES += drivers/arm/gic/v3/gic-x00.c
Alexei Fedorov84f1b5d2020-03-23 18:45:17 +000031ifeq (${GICV3_IMPL_GIC600_MULTICHIP}, 1)
32GICV3_SOURCES += drivers/arm/gic/v3/gic600_multichip.c
33endif
Andre Przywarae1cc1302020-03-25 15:50:38 +000034
35# Set GIC-600 support
36$(eval $(call assert_boolean,GICV3_SUPPORT_GIC600))
37$(eval $(call add_define,GICV3_SUPPORT_GIC600))
Alexei Fedorova6e6ae02020-04-06 16:27:54 +010038
Varun Wadekareea6dc12021-05-04 16:14:09 -070039# Set GIC-600AE FMU support
40$(eval $(call assert_boolean,GICV3_SUPPORT_GIC600AE_FMU))
41$(eval $(call add_define,GICV3_SUPPORT_GIC600AE_FMU))
42
Alexei Fedorov19705932020-04-06 19:00:35 +010043# Set GICv4 extension
44$(eval $(call assert_boolean,GIC_ENABLE_V4_EXTN))
45$(eval $(call add_define,GIC_ENABLE_V4_EXTN))
46
Alexei Fedorova6e6ae02020-04-06 16:27:54 +010047# Set support for extended PPI and SPI range
48$(eval $(call assert_boolean,GIC_EXT_INTID))
49$(eval $(call add_define,GIC_EXT_INTID))