| Zelalem Aweke | 688fbf7 | 2021-07-09 11:37:10 -0500 | [diff] [blame^] | 1 | /* |
| 2 | * Copyright (c) 2021, Arm Limited. All rights reserved. |
| 3 | * |
| 4 | * SPDX-License-Identifier: BSD-3-Clause |
| 5 | */ |
| 6 | |
| 7 | #include <arch.h> |
| 8 | #include <asm_macros.S> |
| 9 | #include <common/bl_common.h> |
| 10 | |
| 11 | .globl bl2_run_next_image |
| 12 | |
| 13 | |
| 14 | func bl2_run_next_image |
| 15 | mov x20,x0 |
| 16 | /* --------------------------------------------- |
| 17 | * MMU needs to be disabled because both BL2 and BL31 execute |
| 18 | * in EL3, and therefore share the same address space. |
| 19 | * BL31 will initialize the address space according to its |
| 20 | * own requirement. |
| 21 | * --------------------------------------------- |
| 22 | */ |
| 23 | bl disable_mmu_icache_el3 |
| 24 | tlbi alle3 |
| 25 | bl bl2_el3_plat_prepare_exit |
| 26 | |
| 27 | #if ENABLE_PAUTH |
| 28 | /* --------------------------------------------- |
| 29 | * Disable pointer authentication before jumping |
| 30 | * to next boot image. |
| 31 | * --------------------------------------------- |
| 32 | */ |
| 33 | bl pauth_disable_el3 |
| 34 | #endif /* ENABLE_PAUTH */ |
| 35 | |
| 36 | ldp x0, x1, [x20, #ENTRY_POINT_INFO_PC_OFFSET] |
| 37 | msr elr_el3, x0 |
| 38 | msr spsr_el3, x1 |
| 39 | |
| 40 | ldp x6, x7, [x20, #(ENTRY_POINT_INFO_ARGS_OFFSET + 0x30)] |
| 41 | ldp x4, x5, [x20, #(ENTRY_POINT_INFO_ARGS_OFFSET + 0x20)] |
| 42 | ldp x2, x3, [x20, #(ENTRY_POINT_INFO_ARGS_OFFSET + 0x10)] |
| 43 | ldp x0, x1, [x20, #(ENTRY_POINT_INFO_ARGS_OFFSET + 0x0)] |
| 44 | exception_return |
| 45 | endfunc bl2_run_next_image |