Antonio Nino Diaz | 7298c1f | 2018-12-05 00:09:30 +0000 | [diff] [blame] | 1 | /* |
| 2 | * Copyright (c) 2018, ARM Limited and Contributors. All rights reserved. |
| 3 | * |
| 4 | * SPDX-License-Identifier: BSD-3-Clause |
| 5 | */ |
| 6 | |
| 7 | #include <assert.h> |
| 8 | #include <lib/mmio.h> |
| 9 | #include <plat/common/platform.h> |
| 10 | #include <platform_def.h> |
| 11 | #include <string.h> |
Remi Pommarel | 1a13b22 | 2019-03-28 20:55:13 +0100 | [diff] [blame] | 12 | #include <crypto/sha_dma.h> |
Antonio Nino Diaz | 7298c1f | 2018-12-05 00:09:30 +0000 | [diff] [blame] | 13 | |
| 14 | #include "gxl_private.h" |
| 15 | |
| 16 | #define SIZE_SHIFT 20 |
| 17 | #define SIZE_MASK 0x1FF |
Remi Pommarel | 1a13b22 | 2019-03-28 20:55:13 +0100 | [diff] [blame] | 18 | #define SIZE_FWBLK 0x200UL |
Antonio Nino Diaz | 7298c1f | 2018-12-05 00:09:30 +0000 | [diff] [blame] | 19 | |
| 20 | /* |
| 21 | * Note: The Amlogic SCP firmware uses the legacy SCPI protocol. |
| 22 | */ |
| 23 | #define SCPI_CMD_SET_CSS_POWER_STATE 0x04 |
| 24 | #define SCPI_CMD_SET_SYS_POWER_STATE 0x08 |
| 25 | |
| 26 | #define SCPI_CMD_JTAG_SET_STATE 0xC0 |
| 27 | #define SCPI_CMD_EFUSE_READ 0xC2 |
| 28 | |
Remi Pommarel | 1a13b22 | 2019-03-28 20:55:13 +0100 | [diff] [blame] | 29 | #define SCPI_CMD_COPY_FW 0xd4 |
| 30 | #define SCPI_CMD_SET_FW_ADDR 0xd3 |
| 31 | #define SCPI_CMD_FW_SIZE 0xd2 |
| 32 | |
Antonio Nino Diaz | 7298c1f | 2018-12-05 00:09:30 +0000 | [diff] [blame] | 33 | static inline uint32_t scpi_cmd(uint32_t command, uint32_t size) |
| 34 | { |
| 35 | return command | (size << SIZE_SHIFT); |
| 36 | } |
| 37 | |
Remi Pommarel | 1a13b22 | 2019-03-28 20:55:13 +0100 | [diff] [blame] | 38 | static void scpi_secure_message_send(uint32_t command, uint32_t size) |
Antonio Nino Diaz | 7298c1f | 2018-12-05 00:09:30 +0000 | [diff] [blame] | 39 | { |
| 40 | mhu_secure_message_send(scpi_cmd(command, size)); |
| 41 | } |
| 42 | |
| 43 | uint32_t scpi_secure_message_receive(void **message_out, size_t *size_out) |
| 44 | { |
| 45 | uint32_t response = mhu_secure_message_wait(); |
| 46 | |
| 47 | size_t size = (response >> SIZE_SHIFT) & SIZE_MASK; |
| 48 | |
| 49 | response &= ~(SIZE_MASK << SIZE_SHIFT); |
| 50 | |
| 51 | if (size_out != NULL) |
| 52 | *size_out = size; |
| 53 | |
| 54 | if (message_out != NULL) |
| 55 | *message_out = (void *)GXBB_MHU_SECURE_SCP_TO_AP_PAYLOAD; |
| 56 | |
| 57 | return response; |
| 58 | } |
| 59 | |
| 60 | void scpi_set_css_power_state(u_register_t mpidr, uint32_t cpu_state, |
| 61 | uint32_t cluster_state, uint32_t css_state) |
| 62 | { |
| 63 | uint32_t state = (mpidr & 0x0F) | /* CPU ID */ |
| 64 | ((mpidr & 0xF00) >> 4) | /* Cluster ID */ |
| 65 | (cpu_state << 8) | |
| 66 | (cluster_state << 12) | |
| 67 | (css_state << 16); |
| 68 | |
| 69 | mhu_secure_message_start(); |
| 70 | mmio_write_32(GXBB_MHU_SECURE_AP_TO_SCP_PAYLOAD, state); |
| 71 | mhu_secure_message_send(scpi_cmd(SCPI_CMD_SET_CSS_POWER_STATE, 4)); |
| 72 | mhu_secure_message_wait(); |
| 73 | mhu_secure_message_end(); |
| 74 | } |
| 75 | |
| 76 | uint32_t scpi_sys_power_state(uint64_t system_state) |
| 77 | { |
| 78 | uint32_t *response; |
| 79 | size_t size; |
| 80 | |
| 81 | mhu_secure_message_start(); |
| 82 | mmio_write_8(GXBB_MHU_SECURE_AP_TO_SCP_PAYLOAD, system_state); |
| 83 | mhu_secure_message_send(scpi_cmd(SCPI_CMD_SET_SYS_POWER_STATE, 1)); |
| 84 | scpi_secure_message_receive((void *)&response, &size); |
| 85 | mhu_secure_message_end(); |
| 86 | |
| 87 | return *response; |
| 88 | } |
| 89 | |
| 90 | void scpi_jtag_set_state(uint32_t state, uint8_t select) |
| 91 | { |
| 92 | assert(state <= GXBB_JTAG_STATE_OFF); |
| 93 | |
| 94 | if (select > GXBB_JTAG_A53_EE) { |
| 95 | WARN("BL31: Invalid JTAG select (0x%x).\n", select); |
| 96 | return; |
| 97 | } |
| 98 | |
| 99 | mhu_secure_message_start(); |
| 100 | mmio_write_32(GXBB_MHU_SECURE_AP_TO_SCP_PAYLOAD, |
| 101 | (state << 8) | (uint32_t)select); |
| 102 | mhu_secure_message_send(scpi_cmd(SCPI_CMD_JTAG_SET_STATE, 4)); |
| 103 | mhu_secure_message_wait(); |
| 104 | mhu_secure_message_end(); |
| 105 | } |
| 106 | |
| 107 | uint32_t scpi_efuse_read(void *dst, uint32_t base, uint32_t size) |
| 108 | { |
| 109 | uint32_t *response; |
| 110 | size_t resp_size; |
| 111 | |
| 112 | if (size > 0x1FC) |
| 113 | return 0; |
| 114 | |
| 115 | mhu_secure_message_start(); |
| 116 | mmio_write_32(GXBB_MHU_SECURE_AP_TO_SCP_PAYLOAD, base); |
| 117 | mmio_write_32(GXBB_MHU_SECURE_AP_TO_SCP_PAYLOAD + 4, size); |
| 118 | mhu_secure_message_send(scpi_cmd(SCPI_CMD_EFUSE_READ, 8)); |
| 119 | scpi_secure_message_receive((void *)&response, &resp_size); |
| 120 | mhu_secure_message_end(); |
| 121 | |
| 122 | /* |
| 123 | * response[0] is the size of the response message. |
| 124 | * response[1 ... N] are the contents. |
| 125 | */ |
| 126 | if (*response != 0) |
| 127 | memcpy(dst, response + 1, *response); |
| 128 | |
| 129 | return *response; |
| 130 | } |
| 131 | |
| 132 | void scpi_unknown_thermal(uint32_t arg0, uint32_t arg1, |
| 133 | uint32_t arg2, uint32_t arg3) |
| 134 | { |
| 135 | mhu_secure_message_start(); |
| 136 | mmio_write_32(GXBB_MHU_SECURE_AP_TO_SCP_PAYLOAD + 0x0, arg0); |
| 137 | mmio_write_32(GXBB_MHU_SECURE_AP_TO_SCP_PAYLOAD + 0x4, arg1); |
| 138 | mmio_write_32(GXBB_MHU_SECURE_AP_TO_SCP_PAYLOAD + 0x8, arg2); |
| 139 | mmio_write_32(GXBB_MHU_SECURE_AP_TO_SCP_PAYLOAD + 0xC, arg3); |
| 140 | mhu_secure_message_send(scpi_cmd(0xC3, 16)); |
| 141 | mhu_secure_message_wait(); |
Remi Pommarel | 1a13b22 | 2019-03-28 20:55:13 +0100 | [diff] [blame] | 142 | mhu_secure_message_end(); |
| 143 | } |
| 144 | |
| 145 | static inline void scpi_copy_scp_data(uint8_t *data, size_t len) |
| 146 | { |
| 147 | void *dst = (void *)GXBB_MHU_SECURE_AP_TO_SCP_PAYLOAD; |
| 148 | size_t sz; |
| 149 | |
| 150 | mmio_write_32(GXBB_MHU_SECURE_AP_TO_SCP_PAYLOAD, len); |
| 151 | scpi_secure_message_send(SCPI_CMD_FW_SIZE, len); |
| 152 | mhu_secure_message_wait(); |
| 153 | |
| 154 | for (sz = 0; sz < len; sz += SIZE_FWBLK) { |
| 155 | memcpy(dst, data + sz, MIN(SIZE_FWBLK, len - sz)); |
| 156 | mhu_secure_message_send(SCPI_CMD_COPY_FW); |
| 157 | } |
| 158 | } |
| 159 | |
| 160 | static inline void scpi_set_scp_addr(uint64_t addr, size_t len) |
| 161 | { |
| 162 | volatile uint64_t *dst = (uint64_t *)GXBB_MHU_SECURE_AP_TO_SCP_PAYLOAD; |
| 163 | |
| 164 | /* |
| 165 | * It is ok as GXBB_MHU_SECURE_AP_TO_SCP_PAYLOAD is mapped as |
| 166 | * non cachable |
| 167 | */ |
| 168 | *dst = addr; |
| 169 | scpi_secure_message_send(SCPI_CMD_SET_FW_ADDR, sizeof(addr)); |
| 170 | mhu_secure_message_wait(); |
| 171 | |
| 172 | mmio_write_32(GXBB_MHU_SECURE_AP_TO_SCP_PAYLOAD, len); |
| 173 | scpi_secure_message_send(SCPI_CMD_FW_SIZE, len); |
| 174 | mhu_secure_message_wait(); |
| 175 | } |
| 176 | |
| 177 | static inline void scpi_send_fw_hash(uint8_t hash[], size_t len) |
| 178 | { |
| 179 | void *dst = (void *)GXBB_MHU_SECURE_AP_TO_SCP_PAYLOAD; |
| 180 | |
| 181 | memcpy(dst, hash, len); |
| 182 | mhu_secure_message_send(0xd0); |
| 183 | mhu_secure_message_send(0xd1); |
| 184 | mhu_secure_message_send(0xd5); |
Antonio Nino Diaz | 7298c1f | 2018-12-05 00:09:30 +0000 | [diff] [blame] | 185 | mhu_secure_message_end(); |
| 186 | } |
Remi Pommarel | 1a13b22 | 2019-03-28 20:55:13 +0100 | [diff] [blame] | 187 | |
| 188 | /** |
| 189 | * Upload a FW to SCP. |
| 190 | * |
| 191 | * @param addr: firmware data address |
| 192 | * @param size: size of firmware |
| 193 | * @param send: If set, actually copy the firmware in SCP memory otherwise only |
| 194 | * send the firmware address. |
| 195 | */ |
| 196 | void scpi_upload_scp_fw(uintptr_t addr, size_t size, int send) |
| 197 | { |
| 198 | struct asd_ctx ctx; |
| 199 | |
| 200 | asd_sha_init(&ctx, ASM_SHA256); |
| 201 | asd_sha_update(&ctx, (void *)addr, size); |
| 202 | asd_sha_finalize(&ctx); |
| 203 | |
| 204 | mhu_secure_message_start(); |
| 205 | if (send == 0) |
| 206 | scpi_set_scp_addr(addr, size); |
| 207 | else |
| 208 | scpi_copy_scp_data((void *)addr, size); |
| 209 | |
| 210 | scpi_send_fw_hash(ctx.digest, sizeof(ctx.digest)); |
| 211 | } |