Nariman Poushin | 0ece80f | 2018-02-26 06:52:04 +0000 | [diff] [blame] | 1 | /* |
| 2 | * Copyright (c) 2018, ARM Limited and Contributors. All rights reserved. |
| 3 | * |
| 4 | * SPDX-License-Identifier: BSD-3-Clause |
| 5 | */ |
| 6 | |
| 7 | #include <arch.h> |
| 8 | #include <asm_macros.S> |
| 9 | #include <platform_def.h> |
| 10 | |
| 11 | .globl plat_is_my_cpu_primary |
| 12 | .globl plat_arm_calc_core_pos |
| 13 | |
| 14 | /* ----------------------------------------------------- |
| 15 | * unsigned int plat_is_my_cpu_primary (void); |
| 16 | * |
| 17 | * Find out whether the current cpu is the primary |
| 18 | * cpu (applicable only after a cold boot) |
| 19 | * ----------------------------------------------------- |
| 20 | */ |
| 21 | func plat_is_my_cpu_primary |
| 22 | mov x9, x30 |
| 23 | bl plat_my_core_pos |
| 24 | ldr x1, =SGI_BOOT_CFG_ADDR |
| 25 | ldr x1, [x1] |
| 26 | ubfx x1, x1, #PLAT_CSS_PRIMARY_CPU_SHIFT, \ |
| 27 | #PLAT_CSS_PRIMARY_CPU_BIT_WIDTH |
| 28 | cmp x0, x1 |
| 29 | cset w0, eq |
| 30 | ret x9 |
| 31 | endfunc plat_is_my_cpu_primary |
| 32 | |
| 33 | /* ----------------------------------------------------- |
Vishwanatha HG | 64f0b6f | 2018-05-08 17:15:37 +0530 | [diff] [blame^] | 34 | * unsigned int plat_arm_calc_core_pos(u_register_t mpidr) |
| 35 | * |
| 36 | * Helper function to calculate the core position. |
| 37 | * (ClusterId * CSS_SGI_MAX_CPUS_PER_CLUSTER * CSS_SGI_MAX_PE_PER_CPU) + |
| 38 | * (CPUId * CSS_SGI_MAX_PE_PER_CPU) + |
| 39 | * ThreadId |
| 40 | * |
| 41 | * which can be simplified as: |
| 42 | * |
| 43 | * ((ClusterId * CSS_SGI_MAX_CPUS_PER_CLUSTER + CPUId) * |
| 44 | * CSS_SGI_MAX_PE_PER_CPU) + ThreadId |
| 45 | * ------------------------------------------------------ |
| 46 | */ |
| 47 | |
Nariman Poushin | 0ece80f | 2018-02-26 06:52:04 +0000 | [diff] [blame] | 48 | func plat_arm_calc_core_pos |
Vishwanatha HG | 64f0b6f | 2018-05-08 17:15:37 +0530 | [diff] [blame^] | 49 | mov x3, x0 |
| 50 | |
| 51 | /* |
| 52 | * The MT bit in MPIDR is always set for SGI platforms |
| 53 | * and the affinity level 0 corresponds to thread affinity level. |
| 54 | */ |
| 55 | |
| 56 | /* Extract individual affinity fields from MPIDR */ |
| 57 | ubfx x0, x3, #MPIDR_AFF0_SHIFT, #MPIDR_AFFINITY_BITS |
| 58 | ubfx x1, x3, #MPIDR_AFF1_SHIFT, #MPIDR_AFFINITY_BITS |
| 59 | ubfx x2, x3, #MPIDR_AFF2_SHIFT, #MPIDR_AFFINITY_BITS |
| 60 | |
| 61 | /* Compute linear position */ |
| 62 | mov x4, #CSS_SGI_MAX_CPUS_PER_CLUSTER |
| 63 | madd x1, x2, x4, x1 |
| 64 | mov x5, #CSS_SGI_MAX_PE_PER_CPU |
| 65 | madd x0, x1, x5, x0 |
Nariman Poushin | 0ece80f | 2018-02-26 06:52:04 +0000 | [diff] [blame] | 66 | ret |
| 67 | endfunc plat_arm_calc_core_pos |