Dan Handley | 9df4804 | 2015-03-19 18:58:55 +0000 | [diff] [blame] | 1 | /* |
Soby Mathew | 73b7bf9 | 2017-05-03 12:58:41 +0100 | [diff] [blame] | 2 | * Copyright (c) 2016-2017, ARM Limited and Contributors. All rights reserved. |
Dan Handley | 9df4804 | 2015-03-19 18:58:55 +0000 | [diff] [blame] | 3 | * |
dp-arm | fa3cf0b | 2017-05-03 09:38:09 +0100 | [diff] [blame] | 4 | * SPDX-License-Identifier: BSD-3-Clause |
Dan Handley | 9df4804 | 2015-03-19 18:58:55 +0000 | [diff] [blame] | 5 | */ |
| 6 | |
Soby Mathew | 200fffd | 2016-10-21 11:34:59 +0100 | [diff] [blame] | 7 | #ifndef __CSS_SCP_H__ |
| 8 | #define __CSS_SCP_H__ |
Dan Handley | 9df4804 | 2015-03-19 18:58:55 +0000 | [diff] [blame] | 9 | |
Soby Mathew | 1ced6b8 | 2017-06-12 12:37:10 +0100 | [diff] [blame] | 10 | #include <cassert.h> |
| 11 | #include <platform_def.h> |
Soby Mathew | 73b7bf9 | 2017-05-03 12:58:41 +0100 | [diff] [blame] | 12 | #include <types.h> |
Dan Handley | 9df4804 | 2015-03-19 18:58:55 +0000 | [diff] [blame] | 13 | |
Soby Mathew | 73b7bf9 | 2017-05-03 12:58:41 +0100 | [diff] [blame] | 14 | /* Forward declarations */ |
| 15 | struct psci_power_state; |
| 16 | |
| 17 | /* API for power management by SCP */ |
Roberto Vargas | 3caafd7 | 2017-08-16 08:57:45 +0100 | [diff] [blame] | 18 | int css_system_reset2(int is_vendor, int reset_type, u_register_t cookie); |
Soby Mathew | 73b7bf9 | 2017-05-03 12:58:41 +0100 | [diff] [blame] | 19 | void css_scp_suspend(const struct psci_power_state *target_state); |
| 20 | void css_scp_off(const struct psci_power_state *target_state); |
Soby Mathew | 200fffd | 2016-10-21 11:34:59 +0100 | [diff] [blame] | 21 | void css_scp_on(u_register_t mpidr); |
| 22 | int css_scp_get_power_state(u_register_t mpidr, unsigned int power_level); |
| 23 | void __dead2 css_scp_sys_shutdown(void); |
| 24 | void __dead2 css_scp_sys_reboot(void); |
Roberto Vargas | fc2b4eb | 2017-07-31 09:45:10 +0100 | [diff] [blame] | 25 | void __dead2 css_scp_system_off(int state); |
Dan Handley | 9df4804 | 2015-03-19 18:58:55 +0000 | [diff] [blame] | 26 | |
Soby Mathew | 73b7bf9 | 2017-05-03 12:58:41 +0100 | [diff] [blame] | 27 | /* API for SCP Boot Image transfer. Return 0 on success, -1 on error */ |
| 28 | int css_scp_boot_image_xfer(void *image, unsigned int image_size); |
| 29 | |
| 30 | /* |
| 31 | * API to wait for SCP to signal till it's ready after booting the transferred |
| 32 | * image. |
| 33 | */ |
Soby Mathew | 1ced6b8 | 2017-06-12 12:37:10 +0100 | [diff] [blame] | 34 | int css_scp_boot_ready(void); |
| 35 | |
| 36 | #if CSS_LOAD_SCP_IMAGES |
Soby Mathew | af14b46 | 2018-06-01 16:53:38 +0100 | [diff] [blame] | 37 | |
Soby Mathew | 1ced6b8 | 2017-06-12 12:37:10 +0100 | [diff] [blame] | 38 | /* |
Soby Mathew | af14b46 | 2018-06-01 16:53:38 +0100 | [diff] [blame] | 39 | * All CSS platforms load SCP_BL2/SCP_BL2U just below BL2 (this is where BL31 |
| 40 | * usually resides except when ARM_BL31_IN_DRAM is |
| 41 | * set). Ensure that SCP_BL2/SCP_BL2U do not overflow into tb_fw_config. |
Soby Mathew | 1ced6b8 | 2017-06-12 12:37:10 +0100 | [diff] [blame] | 42 | */ |
Soby Mathew | af14b46 | 2018-06-01 16:53:38 +0100 | [diff] [blame] | 43 | CASSERT(SCP_BL2_LIMIT <= BL2_BASE, assert_scp_bl2_overwrite_bl2); |
| 44 | CASSERT(SCP_BL2U_LIMIT <= BL2_BASE, assert_scp_bl2u_overwrite_bl2); |
Soby Mathew | 1ced6b8 | 2017-06-12 12:37:10 +0100 | [diff] [blame] | 45 | |
Soby Mathew | af14b46 | 2018-06-01 16:53:38 +0100 | [diff] [blame] | 46 | CASSERT(SCP_BL2_BASE >= ARM_TB_FW_CONFIG_LIMIT, assert_scp_bl2_overflow); |
| 47 | CASSERT(SCP_BL2U_BASE >= ARM_TB_FW_CONFIG_LIMIT, assert_scp_bl2u_overflow); |
Soby Mathew | 1ced6b8 | 2017-06-12 12:37:10 +0100 | [diff] [blame] | 48 | #endif |
Soby Mathew | 73b7bf9 | 2017-05-03 12:58:41 +0100 | [diff] [blame] | 49 | |
Soby Mathew | 200fffd | 2016-10-21 11:34:59 +0100 | [diff] [blame] | 50 | #endif /* __CSS_SCP_H__ */ |