blob: ed3f2bb70a9a3e8ee7930cb8cfef10cfdd2b4802 [file] [log] [blame]
Jay Buddhabhattic6daff02022-09-05 02:56:32 -07001/*
Michal Simek01297072023-04-25 14:14:06 +02002 * Copyright (c) 2022, Xilinx, Inc. All rights reserved.
Michal Simek646cdd12023-04-25 10:18:10 +02003 * Copyright (c) 2022-2023, Advanced Micro Devices, Inc. All rights reserved.
Jay Buddhabhattic6daff02022-09-05 02:56:32 -07004 *
5 * SPDX-License-Identifier: BSD-3-Clause
6 */
7
8/*
9 * Versal NET IPI agent registers access management
10 */
11
Michal Simek646cdd12023-04-25 10:18:10 +020012#include <lib/utils_def.h>
Jay Buddhabhattic6daff02022-09-05 02:56:32 -070013#include <ipi.h>
14#include <plat_ipi.h>
Jay Buddhabhattic6daff02022-09-05 02:56:32 -070015
16/* versal_net ipi configuration table */
17static const struct ipi_config versal_net_ipi_table[IPI_ID_MAX] = {
18 /* A72 IPI */
19 [IPI_ID_APU] = {
20 .ipi_bit_mask = IPI0_TRIG_BIT,
21 .ipi_reg_base = IPI0_REG_BASE,
22 .secure_only = 0,
23 },
24
25 /* PMC IPI */
26 [IPI_ID_PMC] = {
27 .ipi_bit_mask = PMC_IPI_TRIG_BIT,
28 .ipi_reg_base = IPI0_REG_BASE,
29 .secure_only = 0,
30 },
31
32 /* RPU0 IPI */
33 [IPI_ID_RPU0] = {
34 .ipi_bit_mask = IPI1_TRIG_BIT,
35 .ipi_reg_base = IPI1_REG_BASE,
36 .secure_only = 0,
37 },
38
39 /* RPU1 IPI */
40 [IPI_ID_RPU1] = {
41 .ipi_bit_mask = IPI2_TRIG_BIT,
42 .ipi_reg_base = IPI2_REG_BASE,
43 .secure_only = 0,
44 },
45
46 /* IPI3 IPI */
47 [IPI_ID_3] = {
48 .ipi_bit_mask = IPI3_TRIG_BIT,
49 .ipi_reg_base = IPI3_REG_BASE,
50 .secure_only = 0,
51 },
52
53 /* IPI4 IPI */
54 [IPI_ID_4] = {
55 .ipi_bit_mask = IPI4_TRIG_BIT,
56 .ipi_reg_base = IPI4_REG_BASE,
57 .secure_only = 0,
58 },
59
60 /* IPI5 IPI */
61 [IPI_ID_5] = {
62 .ipi_bit_mask = IPI5_TRIG_BIT,
63 .ipi_reg_base = IPI5_REG_BASE,
64 .secure_only = 0,
65 },
66};
67
68/* versal_net_ipi_config_table_init() - Initialize versal_net IPI configuration data
69 *
70 * @ipi_config_table - IPI configuration table
71 * @ipi_total - Total number of IPI available
72 *
73 */
74void versal_net_ipi_config_table_init(void)
75{
76 ipi_config_table_init(versal_net_ipi_table, ARRAY_SIZE(versal_net_ipi_table));
77}