blob: 5ac611c476a7ba223d08d7327d25b72e771ea6bd [file] [log] [blame]
Michal Simekaa5443e2022-09-19 14:04:55 +02001/*
2 * Copyright (c) 2022, Xilinx, Inc. All rights reserved.
3 * Copyright (C) 2022, Advanced Micro Devices, Inc. All rights reserved.
4 *
5 * SPDX-License-Identifier: BSD-3-Clause
6 */
7
8/* Versal IPI management enums and defines */
9
10#ifndef PLAT_IPI_H
11#define PLAT_IPI_H
12
13#include <stdint.h>
14
15#include <ipi.h>
16
17/*********************************************************************
18 * IPI agent IDs macros
19 ********************************************************************/
20#define IPI_ID_PMC 1U
21#define IPI_ID_APU 2U
22#define IPI_ID_RPU0 3U
23#define IPI_ID_RPU1 4U
24#define IPI_ID_3 5U
25#define IPI_ID_4 6U
26#define IPI_ID_5 7U
27#define IPI_ID_MAX 8U
28
29/*********************************************************************
30 * IPI message buffers
31 ********************************************************************/
32#define IPI_BUFFER_BASEADDR (0xEB3F0000U)
33
34#define IPI_BUFFER_APU_BASE (IPI_BUFFER_BASEADDR + 0x400U)
35#define IPI_BUFFER_PMC_BASE (IPI_BUFFER_BASEADDR + 0x200U)
36
37#define IPI_BUFFER_TARGET_APU_OFFSET 0x80U
38#define IPI_BUFFER_TARGET_PMC_OFFSET 0x40U
39
Michal Simekaa5443e2022-09-19 14:04:55 +020040#define IPI_BUFFER_REMOTE_BASE IPI_BUFFER_PMC_BASE
41
42#define IPI_BUFFER_TARGET_LOCAL_OFFSET IPI_BUFFER_TARGET_APU_OFFSET
43#define IPI_BUFFER_TARGET_REMOTE_OFFSET IPI_BUFFER_TARGET_PMC_OFFSET
44
45#define IPI_BUFFER_MAX_WORDS 8
46
47#define IPI_BUFFER_REQ_OFFSET 0x0U
48#define IPI_BUFFER_RESP_OFFSET 0x20U
49
50/*********************************************************************
51 * Platform specific IPI API declarations
52 ********************************************************************/
53
54/* Configure IPI table for versal_net */
55void versal_net_ipi_config_table_init(void);
56
57#endif /* PLAT_IPI_H */