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Sumit Garg4d4df112018-06-15 14:43:35 +05301/*
2 * Copyright (c) 2018, ARM Limited and Contributors. All rights reserved.
3 *
4 * SPDX-License-Identifier: BSD-3-Clause
5 */
6
Antonio Nino Diaz5eb88372018-11-08 10:20:19 +00007#ifndef SQ_COMMON_H
8#define SQ_COMMON_H
Sumit Garg4d4df112018-06-15 14:43:35 +05309
Antonio Nino Diaz4b32e622018-08-16 16:52:57 +010010#include <stdint.h>
Sumit Garg470255b2018-06-15 15:10:16 +053011#include <xlat_tables_v2.h>
Sumit Garg4d4df112018-06-15 14:43:35 +053012
Ard Biesheuvel6fc122f2018-06-15 15:25:42 +053013struct draminfo {
14 uint32_t num_regions;
15 uint32_t reserved;
16 uint64_t base1;
17 uint64_t size1;
18 uint64_t base2;
19 uint64_t size2;
20 uint64_t base3;
21 uint64_t size3;
22};
23
24uint32_t scpi_get_draminfo(struct draminfo *info);
25
Sumit Gargfe717612018-06-15 15:17:10 +053026void plat_sq_pwrc_setup(void);
27
Sumit Gargbda9d3c2018-06-15 14:50:19 +053028void plat_sq_interconnect_init(void);
29void plat_sq_interconnect_enter_coherency(void);
30void plat_sq_interconnect_exit_coherency(void);
31
Sumit Garg4d4df112018-06-15 14:43:35 +053032unsigned int sq_calc_core_pos(u_register_t mpidr);
33
Sumit Gargc412c2c2018-06-15 14:58:25 +053034void sq_gic_driver_init(void);
35void sq_gic_init(void);
36void sq_gic_cpuif_enable(void);
37void sq_gic_cpuif_disable(void);
38void sq_gic_pcpu_init(void);
39
Sumit Garg470255b2018-06-15 15:10:16 +053040void sq_mmap_setup(uintptr_t total_base, size_t total_size,
41 const struct mmap_region *mmap);
42
Antonio Nino Diaz5eb88372018-11-08 10:20:19 +000043#endif /* SQ_COMMON_H */