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Bai Ping06e325e2018-10-28 00:12:34 +08001/*
Jacky Baif7dc4012019-03-06 16:58:18 +08002 * Copyright (c) 2018-2019, ARM Limited and Contributors. All rights reserved.
Bai Ping06e325e2018-10-28 00:12:34 +08003 *
4 * SPDX-License-Identifier: BSD-3-Clause
5 */
6
7#ifndef IMX8M_GPC_H
8#define IMX8M_GPC_H
9
Jacky Baid3d79722020-06-03 14:24:38 +080010#include <gpc_reg.h>
Jacky Bai9bd2f842019-11-28 13:16:33 +080011
Bai Ping06e325e2018-10-28 00:12:34 +080012/* helper macro */
13#define A53_LPM_MASK U(0xF)
14#define A53_LPM_WAIT U(0x5)
15#define A53_LPM_STOP U(0xA)
Jacky Baif7dc4012019-03-06 16:58:18 +080016#define LPM_MODE(local_state) ((local_state) == PLAT_WAIT_RET_STATE ? A53_LPM_WAIT : A53_LPM_STOP)
Bai Ping06e325e2018-10-28 00:12:34 +080017
18#define DSM_MODE_MASK BIT(31)
Jacky Baid3d79722020-06-03 14:24:38 +080019#define CORE_WKUP_FROM_GIC (IRQ_SRC_C0 | IRQ_SRC_C1 | IRQ_SRC_C2 | IRQ_SRC_C3)
Bai Ping06e325e2018-10-28 00:12:34 +080020#define A53_CORE_WUP_SRC(core_id) (1 << ((core_id) < 2 ? 28 + (core_id) : 22 + (core_id) - 2))
21#define COREx_PGC_PCR(core_id) (0x800 + (core_id) * 0x40)
22#define COREx_WFI_PDN(core_id) (1 << ((core_id) < 2 ? (core_id) * 2 : ((core_id) - 2) * 2 + 16))
23#define COREx_IRQ_WUP(core_id) ((core_id) < 2 ? (1 << ((core_id) * 2 + 8)) : (1 << ((core_id) * 2 + 20)))
24#define COREx_LPM_PUP(core_id) ((core_id) < 2 ? (1 << ((core_id) * 2 + 9)) : (1 << ((core_id) * 2 + 21)))
25#define SLTx_CFG(n) ((SLT0_CFG + ((n) * 4)))
26#define SLT_COREx_PUP(core_id) (0x2 << ((core_id) * 2))
27
Jacky Baif7dc4012019-03-06 16:58:18 +080028#define IMR_MASK_ALL 0xffffffff
29
Jacky Bai07ed02c2020-06-03 14:28:45 +080030#define IMX_PD_DOMAIN(name, on) \
31 { \
32 .pwr_req = name##_PWR_REQ, \
33 .pgc_offset = name##_PGC, \
34 .need_sync = false, \
35 .always_on = true, \
36 }
37
38#define IMX_MIX_DOMAIN(name, on) \
39 { \
40 .pwr_req = name##_PWR_REQ, \
41 .pgc_offset = name##_PGC, \
42 .adb400_sync = name##_ADB400_SYNC, \
43 .adb400_ack = name##_ADB400_ACK, \
44 .need_sync = true, \
45 .always_on = true, \
46 }
47
48struct imx_pwr_domain {
49 uint32_t pwr_req;
50 uint32_t adb400_sync;
51 uint32_t adb400_ack;
52 uint32_t pgc_offset;
53 bool need_sync;
54 bool always_on;
55};
56
Jacky Bai3710fc72020-01-07 11:05:22 +080057DECLARE_BAKERY_LOCK(gpc_lock);
58
Bai Ping06e325e2018-10-28 00:12:34 +080059/* function declare */
60void imx_gpc_init(void);
61void imx_set_cpu_secure_entry(unsigned int core_index, uintptr_t sec_entrypoint);
62void imx_set_cpu_pwr_off(unsigned int core_index);
63void imx_set_cpu_pwr_on(unsigned int core_index);
64void imx_set_cpu_lpm(unsigned int core_index, bool pdn);
65void imx_set_cluster_standby(bool retention);
66void imx_set_cluster_powerdown(unsigned int last_core, uint8_t power_state);
Jacky Baif7dc4012019-03-06 16:58:18 +080067void imx_noc_slot_config(bool pdn);
68void imx_set_sys_wakeup(unsigned int last_core, bool pdn);
69void imx_set_sys_lpm(unsigned last_core, bool retention);
Bai Ping06e325e2018-10-28 00:12:34 +080070void imx_set_rbc_count(void);
71void imx_clear_rbc_count(void);
72
73#endif /*IMX8M_GPC_H */