blob: 6ab14090fe4c1696cc9970e9304e66dfff56b339 [file] [log] [blame]
Hadi Asyrafi616da772019-06-27 11:34:03 +08001/*
2 * Copyright (c) 2019, Intel Corporation. All rights reserved.
3 *
4 * SPDX-License-Identifier: BSD-3-Clause
5 */
6
7#ifndef PLATFORM_PRIVATE_H
8#define PLATFORM_PRIVATE_H
9
10/*******************************************************************************
11 * Function and variable prototypes
12 ******************************************************************************/
13void socfgpa_configure_mmu_el3(unsigned long total_base,
14 unsigned long total_size,
15 unsigned long ro_start,
16 unsigned long ro_limit,
17 unsigned long coh_start,
18 unsigned long coh_limit);
19
20
21void socfpga_configure_mmu_el1(unsigned long total_base,
22 unsigned long total_size,
23 unsigned long ro_start,
24 unsigned long ro_limit,
25 unsigned long coh_start,
26 unsigned long coh_limit);
27
28void socfpga_delay_timer_init(void);
29
30void socfpga_gic_driver_init(void);
31
32uint32_t socfpga_get_spsr_for_bl32_entry(void);
33
34uint32_t socfpga_get_spsr_for_bl33_entry(void);
35
36unsigned long socfpga_get_ns_image_entrypoint(void);
37
38
39#endif /* PLATFORM_PRIVATE_H */