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Nariman Poushin0ece80f2018-02-26 06:52:04 +00001/*
Tony K Nadackala81a3d92021-11-24 16:09:26 +00002 * Copyright (c) 2018-2023, Arm Limited and Contributors. All rights reserved.
Nariman Poushin0ece80f2018-02-26 06:52:04 +00003 *
4 * SPDX-License-Identifier: BSD-3-Clause
5 */
6
Chandni Cherukuric8ef0452018-10-04 16:32:03 +05307#include <assert.h>
Antonio Nino Diaze0f90632018-12-14 00:18:21 +00008
Chandni Cherukuric8ef0452018-10-04 16:32:03 +05309#include <libfdt.h>
Antonio Nino Diaze0f90632018-12-14 00:18:21 +000010
11#include <common/bl_common.h>
12#include <common/debug.h>
Antonio Nino Diaz1b0c6f12019-01-23 21:08:43 +000013#include <drivers/arm/css/css_mhu_doorbell.h>
Antonio Nino Diazc30db5b2019-01-23 20:37:32 +000014#include <drivers/arm/css/scmi.h>
Antonio Nino Diazbd7b7402019-01-25 14:30:04 +000015#include <plat/arm/common/plat_arm.h>
Pranav Madhu078dc522022-07-27 14:01:24 +053016
Ambroise Vincentb237bca2019-02-13 15:58:00 +000017#include <plat/common/platform.h>
Antonio Nino Diaze0f90632018-12-14 00:18:21 +000018
Pranav Madhu078dc522022-07-27 14:01:24 +053019#include <plat/arm/css/common/css_pm.h>
20
Sughosh Ganu18f513d2018-05-16 17:22:35 +053021#include <sgi_ras.h>
Chandni Cherukuric8ef0452018-10-04 16:32:03 +053022#include <sgi_variant.h>
Antonio Nino Diaze0f90632018-12-14 00:18:21 +000023
Chandni Cherukuric8ef0452018-10-04 16:32:03 +053024sgi_platform_info_t sgi_plat_info;
25
Chandni Cherukuri61f3a7c2018-10-11 14:08:08 +053026static scmi_channel_plat_info_t sgi575_scmi_plat_info = {
27 .scmi_mbx_mem = CSS_SCMI_PAYLOAD_BASE,
28 .db_reg_addr = PLAT_CSS_MHU_BASE + CSS_SCMI_MHU_DB_REG_OFF,
29 .db_preserve_mask = 0xfffffffe,
30 .db_modify_mask = 0x1,
31 .ring_doorbell = &mhu_ring_doorbell,
32};
33
Aditya Angadidf9904a2021-01-28 12:15:16 +053034static scmi_channel_plat_info_t plat_rd_scmi_info[] = {
Vijayenthiran Subramaniamc4e68a42019-10-28 14:49:48 +053035 {
Chandni Cherukuric8ef0452018-10-04 16:32:03 +053036 .scmi_mbx_mem = CSS_SCMI_PAYLOAD_BASE,
37 .db_reg_addr = PLAT_CSS_MHU_BASE + SENDER_REG_SET(0),
38 .db_preserve_mask = 0xfffffffe,
39 .db_modify_mask = 0x1,
40 .ring_doorbell = &mhuv2_ring_doorbell,
Vijayenthiran Subramaniamc4e68a42019-10-28 14:49:48 +053041 },
42 #if (CSS_SGI_CHIP_COUNT > 1)
43 {
44 .scmi_mbx_mem = CSS_SCMI_PAYLOAD_BASE +
45 CSS_SGI_REMOTE_CHIP_MEM_OFFSET(1),
46 .db_reg_addr = PLAT_CSS_MHU_BASE
47 + CSS_SGI_REMOTE_CHIP_MEM_OFFSET(1) + SENDER_REG_SET(0),
48 .db_preserve_mask = 0xfffffffe,
49 .db_modify_mask = 0x1,
50 .ring_doorbell = &mhuv2_ring_doorbell,
51 },
52 #endif
53 #if (CSS_SGI_CHIP_COUNT > 2)
54 {
55 .scmi_mbx_mem = CSS_SCMI_PAYLOAD_BASE +
56 CSS_SGI_REMOTE_CHIP_MEM_OFFSET(2),
57 .db_reg_addr = PLAT_CSS_MHU_BASE +
58 CSS_SGI_REMOTE_CHIP_MEM_OFFSET(2) + SENDER_REG_SET(0),
59 .db_preserve_mask = 0xfffffffe,
60 .db_modify_mask = 0x1,
61 .ring_doorbell = &mhuv2_ring_doorbell,
62 },
63 #endif
64 #if (CSS_SGI_CHIP_COUNT > 3)
65 {
66 .scmi_mbx_mem = CSS_SCMI_PAYLOAD_BASE +
67 CSS_SGI_REMOTE_CHIP_MEM_OFFSET(3),
68 .db_reg_addr = PLAT_CSS_MHU_BASE +
69 CSS_SGI_REMOTE_CHIP_MEM_OFFSET(3) + SENDER_REG_SET(0),
70 .db_preserve_mask = 0xfffffffe,
71 .db_modify_mask = 0x1,
72 .ring_doorbell = &mhuv2_ring_doorbell,
73 },
74 #endif
Chandni Cherukuric8ef0452018-10-04 16:32:03 +053075};
76
Tony K Nadackal1b116a82022-12-07 20:44:05 +000077scmi_channel_plat_info_t *plat_css_get_scmi_info(unsigned int channel_id)
Chandni Cherukuri61f3a7c2018-10-11 14:08:08 +053078{
Aditya Angadie6508952019-07-21 22:13:45 +053079 if (sgi_plat_info.platform_id == RD_N1E1_EDGE_SID_VER_PART_NUM ||
Aditya Angadied339d82020-12-15 17:10:50 +053080 sgi_plat_info.platform_id == RD_V1_SID_VER_PART_NUM ||
Aditya Angadif894b9a2021-03-20 12:15:04 +053081 sgi_plat_info.platform_id == RD_N2_SID_VER_PART_NUM ||
Joel Goddard38f35c82022-09-21 21:51:12 +053082 sgi_plat_info.platform_id == RD_V2_SID_VER_PART_NUM ||
Tony K Nadackala81a3d92021-11-24 16:09:26 +000083 sgi_plat_info.platform_id == RD_N2_CFG1_SID_VER_PART_NUM ||
84 sgi_plat_info.platform_id == RD_N2_CFG3_SID_VER_PART_NUM) {
Aditya Angadidf9904a2021-01-28 12:15:16 +053085 if (channel_id >= ARRAY_SIZE(plat_rd_scmi_info))
Vijayenthiran Subramaniamc4e68a42019-10-28 14:49:48 +053086 panic();
Aditya Angadidf9904a2021-01-28 12:15:16 +053087 return &plat_rd_scmi_info[channel_id];
Vijayenthiran Subramaniamc4e68a42019-10-28 14:49:48 +053088 }
Chandni Cherukuric8ef0452018-10-04 16:32:03 +053089 else if (sgi_plat_info.platform_id == SGI575_SSC_VER_PART_NUM)
90 return &sgi575_scmi_plat_info;
91 else
92 panic();
Ambroise Vincentb237bca2019-02-13 15:58:00 +000093}
Chandni Cherukuric8ef0452018-10-04 16:32:03 +053094
Nariman Poushin0ece80f2018-02-26 06:52:04 +000095void bl31_early_platform_setup2(u_register_t arg0, u_register_t arg1,
96 u_register_t arg2, u_register_t arg3)
97{
Chandni Cherukuri3aa09f72018-11-28 11:31:51 +053098 sgi_plat_info.platform_id = plat_arm_sgi_get_platform_id();
99 sgi_plat_info.config_id = plat_arm_sgi_get_config_id();
Vijayenthiran Subramaniam8af18432019-10-22 15:46:14 +0530100 sgi_plat_info.multi_chip_mode = plat_arm_sgi_get_multi_chip_mode();
Chandni Cherukuric8ef0452018-10-04 16:32:03 +0530101
Nariman Poushin0ece80f2018-02-26 06:52:04 +0000102 arm_bl31_early_platform_setup((void *)arg0, arg1, arg2, (void *)arg3);
103}
Sughosh Ganu18f513d2018-05-16 17:22:35 +0530104
Vijayenthiran Subramaniam2b4ad8d2019-09-23 19:32:32 +0530105void sgi_bl31_common_platform_setup(void)
Sughosh Ganu18f513d2018-05-16 17:22:35 +0530106{
107 arm_bl31_platform_setup();
108
109#if RAS_EXTENSION
110 sgi_ras_intr_handler_setup();
111#endif
Pranav Madhu078dc522022-07-27 14:01:24 +0530112
113 /* Configure the warm reboot SGI for primary core */
114 css_setup_cpu_pwr_down_intr();
115
116#if CSS_SYSTEM_GRACEFUL_RESET
117 /* Register priority level handlers for reboot */
118 ehf_register_priority_handler(PLAT_REBOOT_PRI,
119 css_reboot_interrupt_handler);
120#endif
Sughosh Ganu18f513d2018-05-16 17:22:35 +0530121}
Chandni Cherukurie4bf6a02018-11-14 13:43:59 +0530122
123const plat_psci_ops_t *plat_arm_psci_override_pm_ops(plat_psci_ops_t *ops)
124{
Aditya Angadie6508952019-07-21 22:13:45 +0530125 /*
Pranav Madhue0195fd2021-01-16 22:47:08 +0530126 * For RD-E1-Edge, only CPU power ON/OFF, PSCI platform callbacks are
127 * supported.
Aditya Angadie6508952019-07-21 22:13:45 +0530128 */
129 if (((sgi_plat_info.platform_id == RD_N1E1_EDGE_SID_VER_PART_NUM) &&
Pranav Madhue0195fd2021-01-16 22:47:08 +0530130 (sgi_plat_info.config_id == RD_E1_EDGE_CONFIG_ID))) {
Chandni Cherukuri2dfe1d02018-11-22 10:15:25 +0530131 ops->cpu_standby = NULL;
132 ops->system_off = NULL;
133 ops->system_reset = NULL;
134 ops->get_sys_suspend_power_state = NULL;
135 ops->pwr_domain_suspend = NULL;
136 ops->pwr_domain_suspend_finish = NULL;
137 }
138
Chandni Cherukurie4bf6a02018-11-14 13:43:59 +0530139 return css_scmi_override_pm_ops(ops);
140}