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Usama Ariff1513622021-04-09 17:07:41 +01001TC Total Compute Platform
Usama Arifbec5afd2020-04-17 16:13:39 +01002==========================
3
Usama Ariff1513622021-04-09 17:07:41 +01004Some of the features of TC platform referenced in TF-A include:
Usama Arifbec5afd2020-04-17 16:13:39 +01005
6- A `System Control Processor <https://github.com/ARM-software/SCP-firmware>`_
7 to abstract power and system management tasks away from application
8 processors. The RAM firmware for SCP is included in the TF-A FIP and is
9 loaded by AP BL2 from FIP in flash to SRAM for copying by SCP (SCP has access
10 to AP SRAM).
11- GICv4
12- Trusted Board Boot
13- SCMI
14- MHUv2
15
Icen Zeyada0444aac2024-11-19 16:16:38 +000016The TF-A build is specified by the option `TARGET_PLATFORM` which represents
17the Total Compute platform number. The platforms support the CPU variants
18listed as below:
Usama Ariff1513622021-04-09 17:07:41 +010019
Daniel Boulby1f7786b2023-06-22 15:26:07 +010020- TC0 has support for Cortex A510, Cortex A710 and Cortex X2. (Note TC0 is now deprecated)
Manish V Badarkhec7570d12023-11-20 18:25:49 +000021- TC1 has support for Cortex A510, Cortex A715 and Cortex X3. (Note TC1 is now deprecated)
Icen Zeyada0444aac2024-11-19 16:16:38 +000022- TC2 has support for Cortex A520, Cortex A720 and Cortex x4. (Note TC2 is now deprecated)
23- TC3 has support for Cortex A520, Cortex A725 and Cortex x925.
24
Usama Ariff1513622021-04-09 17:07:41 +010025
Usama Arifbec5afd2020-04-17 16:13:39 +010026Boot Sequence
27-------------
28
29The execution begins from SCP_BL1. SCP_BL1 powers up the AP which starts
30executing AP_BL1 and then executes AP_BL2 which loads the SCP_BL2 from
31FIP to SRAM. The SCP has access to AP SRAM. The address and size of SCP_BL2
32is communicated to SCP using SDS. SCP copies SCP_BL2 from SRAM to its own
33RAM and starts executing it. The AP then continues executing the rest of TF-A
34stages including BL31 runtime stage and hands off executing to
35Non-secure world (u-boot).
36
37Build Procedure (TF-A only)
38~~~~~~~~~~~~~~~~~~~~~~~~~~~
39
Rupinderjit Singh820b3b62022-04-04 17:28:41 +010040- Obtain `Arm toolchain`_ and set the CROSS_COMPILE environment variable to
41 point to the toolchain folder.
Usama Arifbec5afd2020-04-17 16:13:39 +010042
43- Build TF-A:
44
45 .. code:: shell
46
Usama Ariff1513622021-04-09 17:07:41 +010047 make PLAT=tc BL33=<path_to_uboot.bin> \
Icen Zeyada0444aac2024-11-19 16:16:38 +000048 SCP_BL2=<path_to_scp_ramfw.bin> TARGET_PLATFORM={3} all fip
Usama Arifbec5afd2020-04-17 16:13:39 +010049
50 Enable TBBR by adding the following options to the make command:
51
52 .. code:: shell
53
54 MBEDTLS_DIR=<path_to_mbedtls_directory> \
55 TRUSTED_BOARD_BOOT=1 \
56 GENERATE_COT=1 \
57 ARM_ROTPK_LOCATION=devel_rsa \
58 ROT_KEY=plat/arm/board/common/rotpk/arm_rotprivk_rsa.pem
59
Rupinderjit Singh820b3b62022-04-04 17:28:41 +010060--------------
61
Govindraj Raja37012fb2023-06-23 11:28:05 -050062*Copyright (c) 2020-2023, Arm Limited. All rights reserved.*
Rupinderjit Singh820b3b62022-04-04 17:28:41 +010063
64.. _Arm Toolchain: https://developer.arm.com/tools-and-software/open-source-software/developer-tools/gnu-toolchain/downloads