Vikram Kanigiri | 1eabdbc | 2016-01-28 17:22:16 +0000 | [diff] [blame] | 1 | /* |
| 2 | * Copyright (c) 2016, ARM Limited and Contributors. All rights reserved. |
| 3 | * |
| 4 | * Redistribution and use in source and binary forms, with or without |
| 5 | * modification, are permitted provided that the following conditions are met: |
| 6 | * |
| 7 | * Redistributions of source code must retain the above copyright notice, this |
| 8 | * list of conditions and the following disclaimer. |
| 9 | * |
| 10 | * Redistributions in binary form must reproduce the above copyright notice, |
| 11 | * this list of conditions and the following disclaimer in the documentation |
| 12 | * and/or other materials provided with the distribution. |
| 13 | * |
| 14 | * Neither the name of ARM nor the names of its contributors may be used |
| 15 | * to endorse or promote products derived from this software without specific |
| 16 | * prior written permission. |
| 17 | * |
| 18 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
| 19 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
| 20 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE |
| 21 | * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE |
| 22 | * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR |
| 23 | * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF |
| 24 | * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS |
| 25 | * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN |
| 26 | * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) |
| 27 | * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE |
| 28 | * POSSIBILITY OF SUCH DAMAGE. |
| 29 | */ |
| 30 | |
| 31 | #include <mmio.h> |
| 32 | #include <tzc_common.h> |
| 33 | |
| 34 | #define DEFINE_TZC_COMMON_WRITE_ACTION(fn_name, macro_name) \ |
| 35 | static inline void _tzc##fn_name##_write_action( \ |
| 36 | uintptr_t base, \ |
| 37 | tzc_action_t action) \ |
| 38 | { \ |
| 39 | mmio_write_32(base + TZC_##macro_name##_ACTION_OFF, \ |
| 40 | action); \ |
| 41 | } |
| 42 | |
| 43 | #define DEFINE_TZC_COMMON_WRITE_REGION_BASE(fn_name, macro_name) \ |
| 44 | static inline void _tzc##fn_name##_write_region_base( \ |
| 45 | uintptr_t base, \ |
| 46 | int region_no, \ |
| 47 | uintptr_t region_base) \ |
| 48 | { \ |
| 49 | mmio_write_32(base + \ |
| 50 | TZC_REGION_OFFSET( \ |
| 51 | TZC_##macro_name##_REGION_SIZE, \ |
| 52 | region_no) + \ |
| 53 | TZC_##macro_name##_REGION_BASE_LOW_0_OFFSET, \ |
| 54 | (unsigned int)region_base); \ |
| 55 | mmio_write_32(base + \ |
| 56 | TZC_REGION_OFFSET( \ |
| 57 | TZC_##macro_name##_REGION_SIZE, \ |
| 58 | region_no) + \ |
| 59 | TZC_##macro_name##_REGION_BASE_HIGH_0_OFFSET, \ |
| 60 | (unsigned int)(region_base >> 32)); \ |
| 61 | } |
| 62 | |
| 63 | #define DEFINE_TZC_COMMON_WRITE_REGION_TOP(fn_name, macro_name) \ |
| 64 | static inline void _tzc##fn_name##_write_region_top( \ |
| 65 | uintptr_t base, \ |
| 66 | int region_no, \ |
| 67 | uintptr_t region_top) \ |
| 68 | { \ |
| 69 | mmio_write_32(base + \ |
| 70 | TZC_REGION_OFFSET \ |
| 71 | (TZC_##macro_name##_REGION_SIZE, \ |
| 72 | region_no) + \ |
| 73 | TZC_##macro_name##_REGION_TOP_LOW_0_OFFSET, \ |
| 74 | (unsigned int)region_top); \ |
| 75 | mmio_write_32(base + \ |
| 76 | TZC_REGION_OFFSET( \ |
| 77 | TZC_##macro_name##_REGION_SIZE, \ |
| 78 | region_no) + \ |
| 79 | TZC_##macro_name##_REGION_TOP_HIGH_0_OFFSET, \ |
| 80 | (unsigned int)(region_top >> 32)); \ |
| 81 | } |
| 82 | |
| 83 | #define DEFINE_TZC_COMMON_WRITE_REGION_ATTRIBUTES(fn_name, macro_name) \ |
| 84 | static inline void _tzc##fn_name##_write_region_attributes( \ |
| 85 | uintptr_t base, \ |
| 86 | int region_no, \ |
| 87 | unsigned int attr) \ |
| 88 | { \ |
| 89 | mmio_write_32(base + \ |
| 90 | TZC_REGION_OFFSET( \ |
| 91 | TZC_##macro_name##_REGION_SIZE, \ |
| 92 | region_no) + \ |
| 93 | TZC_##macro_name##_REGION_ATTR_0_OFFSET, \ |
| 94 | attr); \ |
| 95 | } |
| 96 | |
| 97 | #define DEFINE_TZC_COMMON_WRITE_REGION_ID_ACCESS(fn_name, macro_name) \ |
| 98 | static inline void _tzc##fn_name##_write_region_id_access( \ |
| 99 | uintptr_t base, \ |
| 100 | int region_no, \ |
| 101 | unsigned int val) \ |
| 102 | { \ |
| 103 | mmio_write_32(base + \ |
| 104 | TZC_REGION_OFFSET( \ |
| 105 | TZC_##macro_name##_REGION_SIZE, \ |
| 106 | region_no) + \ |
| 107 | TZC_##macro_name##_REGION_ID_ACCESS_0_OFFSET, \ |
| 108 | val); \ |
| 109 | } |
| 110 | |
| 111 | /* |
| 112 | * It is used to program region 0 ATTRIBUTES and ACCESS register. |
| 113 | */ |
| 114 | #define DEFINE_TZC_COMMON_CONFIGURE_REGION0(fn_name) \ |
| 115 | void _tzc##fn_name##_configure_region0(uintptr_t base, \ |
| 116 | tzc_region_attributes_t sec_attr, \ |
| 117 | unsigned int ns_device_access) \ |
| 118 | { \ |
| 119 | assert(base); \ |
| 120 | VERBOSE("TrustZone : Configuring region 0 " \ |
| 121 | "(TZC Interface Base=%p sec_attr=0x%x," \ |
| 122 | " ns_devs=0x%x)\n", (void *)base, \ |
| 123 | sec_attr, ns_device_access); \ |
| 124 | \ |
| 125 | /* Set secure attributes on region 0 */ \ |
| 126 | _tzc##fn_name##_write_region_attributes(base, 0, \ |
| 127 | sec_attr << TZC_REGION_ATTR_SEC_SHIFT); \ |
| 128 | \ |
| 129 | /***************************************************/ \ |
| 130 | /* Specify which non-secure devices have permission*/ \ |
| 131 | /* to access region 0. */ \ |
| 132 | /***************************************************/ \ |
| 133 | _tzc##fn_name##_write_region_id_access(base, \ |
| 134 | 0, \ |
| 135 | ns_device_access); \ |
| 136 | } |
| 137 | |
| 138 | /* |
| 139 | * It is used to program a region from 1 to 8 in the TrustZone controller. |
| 140 | * NOTE: |
| 141 | * Region 0 is special; it is preferable to use |
| 142 | * ##fn_name##_configure_region0 for this region (see comment for |
| 143 | * that function). |
| 144 | */ |
| 145 | #define DEFINE_TZC_COMMON_CONFIGURE_REGION(fn_name) \ |
| 146 | void _tzc##fn_name##_configure_region(uintptr_t base, \ |
| 147 | unsigned int filters, \ |
| 148 | int region_no, \ |
| 149 | uintptr_t region_base, \ |
| 150 | uintptr_t region_top, \ |
| 151 | tzc_region_attributes_t sec_attr, \ |
| 152 | unsigned int nsaid_permissions) \ |
| 153 | { \ |
| 154 | assert(base); \ |
| 155 | VERBOSE("TrustZone : Configuring region " \ |
| 156 | "(TZC Interface Base: %p, region_no = %d)" \ |
| 157 | "...\n", (void *)base, region_no); \ |
| 158 | VERBOSE("TrustZone : ... base = %p, top = %p," \ |
| 159 | "\n", (void *)region_base, (void *)region_top);\ |
| 160 | VERBOSE("TrustZone : ... sec_attr = 0x%x," \ |
| 161 | " ns_devs = 0x%x)\n", \ |
| 162 | sec_attr, nsaid_permissions); \ |
| 163 | \ |
| 164 | /***************************************************/ \ |
| 165 | /* Inputs look ok, start programming registers. */ \ |
| 166 | /* All the address registers are 32 bits wide and */ \ |
| 167 | /* have a LOW and HIGH */ \ |
| 168 | /* component used to construct an address up to a */ \ |
| 169 | /* 64bit. */ \ |
| 170 | /***************************************************/ \ |
| 171 | _tzc##fn_name##_write_region_base(base, \ |
| 172 | region_no, region_base); \ |
| 173 | _tzc##fn_name##_write_region_top(base, \ |
| 174 | region_no, region_top); \ |
| 175 | \ |
| 176 | /* Enable filter to the region and set secure attributes */\ |
| 177 | _tzc##fn_name##_write_region_attributes(base, \ |
| 178 | region_no, \ |
| 179 | (sec_attr << TZC_REGION_ATTR_SEC_SHIFT) |\ |
| 180 | (filters << TZC_REGION_ATTR_F_EN_SHIFT));\ |
| 181 | \ |
| 182 | /***************************************************/ \ |
| 183 | /* Specify which non-secure devices have permission*/ \ |
| 184 | /* to access this region. */ \ |
| 185 | /***************************************************/ \ |
| 186 | _tzc##fn_name##_write_region_id_access(base, \ |
| 187 | region_no, \ |
| 188 | nsaid_permissions); \ |
| 189 | } |
| 190 | |
| 191 | #if DEBUG |
| 192 | static unsigned int _tzc_read_peripheral_id(uintptr_t base) |
| 193 | { |
| 194 | unsigned int id; |
| 195 | |
| 196 | id = mmio_read_32(base + PID0_OFF); |
| 197 | /* Masks DESC part in PID1 */ |
| 198 | id |= ((mmio_read_32(base + PID1_OFF) & 0xF) << 8); |
| 199 | |
| 200 | return id; |
| 201 | } |
| 202 | #endif |