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Andrew F. Davisa513b2a2018-05-04 19:06:09 +00001/*
2 * Texas Instruments System Control Interface (TISCI) Protocol
3 *
4 * Communication protocol with TI SCI hardware
5 * The system works in a message response protocol
6 * See: http://processors.wiki.ti.com/index.php/TISCI for details
7 *
8 * Copyright (C) 2018 Texas Instruments Incorporated - http://www.ti.com/
9 *
10 * SPDX-License-Identifier: BSD-3-Clause
11 */
12
Antonio Nino Diaz5eb88372018-11-08 10:20:19 +000013#ifndef TI_SCI_PROTOCOL_H
14#define TI_SCI_PROTOCOL_H
Andrew F. Davisa513b2a2018-05-04 19:06:09 +000015
16#include <stdint.h>
17
18/* Generic Messages */
19#define TI_SCI_MSG_ENABLE_WDT 0x0000
20#define TI_SCI_MSG_WAKE_RESET 0x0001
21#define TI_SCI_MSG_VERSION 0x0002
22#define TI_SCI_MSG_WAKE_REASON 0x0003
23#define TI_SCI_MSG_GOODBYE 0x0004
24#define TI_SCI_MSG_SYS_RESET 0x0005
25
26/* Device requests */
27#define TI_SCI_MSG_SET_DEVICE_STATE 0x0200
28#define TI_SCI_MSG_GET_DEVICE_STATE 0x0201
29#define TI_SCI_MSG_SET_DEVICE_RESETS 0x0202
30
31/* Clock requests */
32#define TI_SCI_MSG_SET_CLOCK_STATE 0x0100
33#define TI_SCI_MSG_GET_CLOCK_STATE 0x0101
34#define TI_SCI_MSG_SET_CLOCK_PARENT 0x0102
35#define TI_SCI_MSG_GET_CLOCK_PARENT 0x0103
36#define TI_SCI_MSG_GET_NUM_CLOCK_PARENTS 0x0104
37#define TI_SCI_MSG_SET_CLOCK_FREQ 0x010c
38#define TI_SCI_MSG_QUERY_CLOCK_FREQ 0x010d
39#define TI_SCI_MSG_GET_CLOCK_FREQ 0x010e
40
41/* Processor Control Messages */
42#define TISCI_MSG_PROC_REQUEST 0xc000
43#define TISCI_MSG_PROC_RELEASE 0xc001
44#define TISCI_MSG_PROC_HANDOVER 0xc005
45#define TISCI_MSG_SET_PROC_BOOT_CONFIG 0xc100
46#define TISCI_MSG_SET_PROC_BOOT_CTRL 0xc101
47#define TISCI_MSG_PROC_AUTH_BOOT_IMIAGE 0xc120
48#define TISCI_MSG_GET_PROC_BOOT_STATUS 0xc400
49
50/**
51 * struct ti_sci_msg_hdr - Generic Message Header for All messages and responses
52 * @type: Type of messages: One of TI_SCI_MSG* values
53 * @host: Host of the message
54 * @seq: Message identifier indicating a transfer sequence
55 * @flags: Flag for the message
56 */
57struct ti_sci_msg_hdr {
58 uint16_t type;
59 uint8_t host;
60 uint8_t seq;
61#define TI_SCI_MSG_FLAG(val) (1 << (val))
62#define TI_SCI_FLAG_REQ_GENERIC_NORESPONSE 0x0
63#define TI_SCI_FLAG_REQ_ACK_ON_RECEIVED TI_SCI_MSG_FLAG(0)
64#define TI_SCI_FLAG_REQ_ACK_ON_PROCESSED TI_SCI_MSG_FLAG(1)
65#define TI_SCI_FLAG_RESP_GENERIC_NACK 0x0
66#define TI_SCI_FLAG_RESP_GENERIC_ACK TI_SCI_MSG_FLAG(1)
67 /* Additional Flags */
68 uint32_t flags;
69} __packed;
70
71/**
72 * struct ti_sci_msg_resp_version - Response for a message
73 * @hdr: Generic header
74 * @firmware_description: String describing the firmware
75 * @firmware_revision: Firmware revision
76 * @abi_major: Major version of the ABI that firmware supports
77 * @abi_minor: Minor version of the ABI that firmware supports
78 *
79 * In general, ABI version changes follow the rule that minor version increments
80 * are backward compatible. Major revision changes in ABI may not be
81 * backward compatible.
82 *
83 * Response to a generic message with message type TI_SCI_MSG_VERSION
84 */
85struct ti_sci_msg_resp_version {
86 struct ti_sci_msg_hdr hdr;
87#define FIRMWARE_DESCRIPTION_LENGTH 32
88 char firmware_description[FIRMWARE_DESCRIPTION_LENGTH];
89 uint16_t firmware_revision;
90 uint8_t abi_major;
91 uint8_t abi_minor;
92} __packed;
93
94/**
95 * struct ti_sci_msg_req_reboot - Reboot the SoC
96 * @hdr: Generic Header
97 *
98 * Request type is TI_SCI_MSG_SYS_RESET, responded with a generic
99 * ACK/NACK message.
100 */
101struct ti_sci_msg_req_reboot {
102 struct ti_sci_msg_hdr hdr;
103} __packed;
104
105/**
106 * struct ti_sci_msg_req_set_device_state - Set the desired state of the device
107 * @hdr: Generic header
108 * @id: Indicates which device to modify
109 * @reserved: Reserved space in message, must be 0 for backward compatibility
110 * @state: The desired state of the device.
111 *
112 * Certain flags can also be set to alter the device state:
113 * + MSG_FLAG_DEVICE_WAKE_ENABLED - Configure the device to be a wake source.
114 * The meaning of this flag will vary slightly from device to device and from
115 * SoC to SoC but it generally allows the device to wake the SoC out of deep
116 * suspend states.
117 * + MSG_FLAG_DEVICE_RESET_ISO - Enable reset isolation for this device.
118 * + MSG_FLAG_DEVICE_EXCLUSIVE - Claim this device exclusively. When passed
119 * with STATE_RETENTION or STATE_ON, it will claim the device exclusively.
120 * If another host already has this device set to STATE_RETENTION or STATE_ON,
121 * the message will fail. Once successful, other hosts attempting to set
122 * STATE_RETENTION or STATE_ON will fail.
123 *
124 * Request type is TI_SCI_MSG_SET_DEVICE_STATE, responded with a generic
125 * ACK/NACK message.
126 */
127struct ti_sci_msg_req_set_device_state {
128 /* Additional hdr->flags options */
129#define MSG_FLAG_DEVICE_WAKE_ENABLED TI_SCI_MSG_FLAG(8)
130#define MSG_FLAG_DEVICE_RESET_ISO TI_SCI_MSG_FLAG(9)
131#define MSG_FLAG_DEVICE_EXCLUSIVE TI_SCI_MSG_FLAG(10)
132 struct ti_sci_msg_hdr hdr;
133 uint32_t id;
134 uint32_t reserved;
135
136#define MSG_DEVICE_SW_STATE_AUTO_OFF 0
137#define MSG_DEVICE_SW_STATE_RETENTION 1
138#define MSG_DEVICE_SW_STATE_ON 2
139 uint8_t state;
140} __packed;
141
142/**
143 * struct ti_sci_msg_req_get_device_state - Request to get device.
144 * @hdr: Generic header
145 * @id: Device Identifier
146 *
147 * Request type is TI_SCI_MSG_GET_DEVICE_STATE, responded device state
148 * information
149 */
150struct ti_sci_msg_req_get_device_state {
151 struct ti_sci_msg_hdr hdr;
152 uint32_t id;
153} __packed;
154
155/**
156 * struct ti_sci_msg_resp_get_device_state - Response to get device request.
157 * @hdr: Generic header
158 * @context_loss_count: Indicates how many times the device has lost context. A
159 * driver can use this monotonic counter to determine if the device has
160 * lost context since the last time this message was exchanged.
161 * @resets: Programmed state of the reset lines.
162 * @programmed_state: The state as programmed by set_device.
163 * - Uses the MSG_DEVICE_SW_* macros
164 * @current_state: The actual state of the hardware.
165 *
166 * Response to request TI_SCI_MSG_GET_DEVICE_STATE.
167 */
168struct ti_sci_msg_resp_get_device_state {
169 struct ti_sci_msg_hdr hdr;
170 uint32_t context_loss_count;
171 uint32_t resets;
172 uint8_t programmed_state;
173#define MSG_DEVICE_HW_STATE_OFF 0
174#define MSG_DEVICE_HW_STATE_ON 1
175#define MSG_DEVICE_HW_STATE_TRANS 2
176 uint8_t current_state;
177} __packed;
178
179/**
180 * struct ti_sci_msg_req_set_device_resets - Set the desired resets
181 * configuration of the device
182 * @hdr: Generic header
183 * @id: Indicates which device to modify
184 * @resets: A bit field of resets for the device. The meaning, behavior,
185 * and usage of the reset flags are device specific. 0 for a bit
186 * indicates releasing the reset represented by that bit while 1
187 * indicates keeping it held.
188 *
189 * Request type is TI_SCI_MSG_SET_DEVICE_RESETS, responded with a generic
190 * ACK/NACK message.
191 */
192struct ti_sci_msg_req_set_device_resets {
193 struct ti_sci_msg_hdr hdr;
194 uint32_t id;
195 uint32_t resets;
196} __packed;
197
198/**
199 * struct ti_sci_msg_req_set_clock_state - Request to setup a Clock state
200 * @hdr: Generic Header, Certain flags can be set specific to the clocks:
201 * MSG_FLAG_CLOCK_ALLOW_SSC: Allow this clock to be modified
202 * via spread spectrum clocking.
203 * MSG_FLAG_CLOCK_ALLOW_FREQ_CHANGE: Allow this clock's
204 * frequency to be changed while it is running so long as it
205 * is within the min/max limits.
206 * MSG_FLAG_CLOCK_INPUT_TERM: Enable input termination, this
207 * is only applicable to clock inputs on the SoC pseudo-device.
208 * @dev_id: Device identifier this request is for
209 * @clk_id: Clock identifier for the device for this request.
210 * Each device has it's own set of clock inputs. This indexes
211 * which clock input to modify.
212 * @request_state: Request the state for the clock to be set to.
213 * MSG_CLOCK_SW_STATE_UNREQ: The IP does not require this clock,
214 * it can be disabled, regardless of the state of the device
215 * MSG_CLOCK_SW_STATE_AUTO: Allow the System Controller to
216 * automatically manage the state of this clock. If the device
217 * is enabled, then the clock is enabled. If the device is set
218 * to off or retention, then the clock is internally set as not
219 * being required by the device.(default)
220 * MSG_CLOCK_SW_STATE_REQ: Configure the clock to be enabled,
221 * regardless of the state of the device.
222 *
223 * Normally, all required clocks are managed by TISCI entity, this is used
224 * only for specific control *IF* required. Auto managed state is
225 * MSG_CLOCK_SW_STATE_AUTO, in other states, TISCI entity assume remote
226 * will explicitly control.
227 *
228 * Request type is TI_SCI_MSG_SET_CLOCK_STATE, response is a generic
229 * ACK or NACK message.
230 */
231struct ti_sci_msg_req_set_clock_state {
232 /* Additional hdr->flags options */
233#define MSG_FLAG_CLOCK_ALLOW_SSC TI_SCI_MSG_FLAG(8)
234#define MSG_FLAG_CLOCK_ALLOW_FREQ_CHANGE TI_SCI_MSG_FLAG(9)
235#define MSG_FLAG_CLOCK_INPUT_TERM TI_SCI_MSG_FLAG(10)
236 struct ti_sci_msg_hdr hdr;
237 uint32_t dev_id;
238 uint8_t clk_id;
239#define MSG_CLOCK_SW_STATE_UNREQ 0
240#define MSG_CLOCK_SW_STATE_AUTO 1
241#define MSG_CLOCK_SW_STATE_REQ 2
242 uint8_t request_state;
243} __packed;
244
245/**
246 * struct ti_sci_msg_req_get_clock_state - Request for clock state
247 * @hdr: Generic Header
248 * @dev_id: Device identifier this request is for
249 * @clk_id: Clock identifier for the device for this request.
250 * Each device has it's own set of clock inputs. This indexes
251 * which clock input to get state of.
252 *
253 * Request type is TI_SCI_MSG_GET_CLOCK_STATE, response is state
254 * of the clock
255 */
256struct ti_sci_msg_req_get_clock_state {
257 struct ti_sci_msg_hdr hdr;
258 uint32_t dev_id;
259 uint8_t clk_id;
260} __packed;
261
262/**
263 * struct ti_sci_msg_resp_get_clock_state - Response to get clock state
264 * @hdr: Generic Header
265 * @programmed_state: Any programmed state of the clock. This is one of
266 * MSG_CLOCK_SW_STATE* values.
267 * @current_state: Current state of the clock. This is one of:
268 * MSG_CLOCK_HW_STATE_NOT_READY: Clock is not ready
269 * MSG_CLOCK_HW_STATE_READY: Clock is ready
270 *
271 * Response to TI_SCI_MSG_GET_CLOCK_STATE.
272 */
273struct ti_sci_msg_resp_get_clock_state {
274 struct ti_sci_msg_hdr hdr;
275 uint8_t programmed_state;
276#define MSG_CLOCK_HW_STATE_NOT_READY 0
277#define MSG_CLOCK_HW_STATE_READY 1
278 uint8_t current_state;
279} __packed;
280
281/**
282 * struct ti_sci_msg_req_set_clock_parent - Set the clock parent
283 * @hdr: Generic Header
284 * @dev_id: Device identifier this request is for
285 * @clk_id: Clock identifier for the device for this request.
286 * Each device has it's own set of clock inputs. This indexes
287 * which clock input to modify.
288 * @parent_id: The new clock parent is selectable by an index via this
289 * parameter.
290 *
291 * Request type is TI_SCI_MSG_SET_CLOCK_PARENT, response is generic
292 * ACK / NACK message.
293 */
294struct ti_sci_msg_req_set_clock_parent {
295 struct ti_sci_msg_hdr hdr;
296 uint32_t dev_id;
297 uint8_t clk_id;
298 uint8_t parent_id;
299} __packed;
300
301/**
302 * struct ti_sci_msg_req_get_clock_parent - Get the clock parent
303 * @hdr: Generic Header
304 * @dev_id: Device identifier this request is for
305 * @clk_id: Clock identifier for the device for this request.
306 * Each device has it's own set of clock inputs. This indexes
307 * which clock input to get the parent for.
308 *
309 * Request type is TI_SCI_MSG_GET_CLOCK_PARENT, response is parent information
310 */
311struct ti_sci_msg_req_get_clock_parent {
312 struct ti_sci_msg_hdr hdr;
313 uint32_t dev_id;
314 uint8_t clk_id;
315} __packed;
316
317/**
318 * struct ti_sci_msg_resp_get_clock_parent - Response with clock parent
319 * @hdr: Generic Header
320 * @parent_id: The current clock parent
321 *
322 * Response to TI_SCI_MSG_GET_CLOCK_PARENT.
323 */
324struct ti_sci_msg_resp_get_clock_parent {
325 struct ti_sci_msg_hdr hdr;
326 uint8_t parent_id;
327} __packed;
328
329/**
330 * struct ti_sci_msg_req_get_clock_num_parents - Request to get clock parents
331 * @hdr: Generic header
332 * @dev_id: Device identifier this request is for
333 * @clk_id: Clock identifier for the device for this request.
334 *
335 * This request provides information about how many clock parent options
336 * are available for a given clock to a device. This is typically used
337 * for input clocks.
338 *
339 * Request type is TI_SCI_MSG_GET_NUM_CLOCK_PARENTS, response is appropriate
340 * message, or NACK in case of inability to satisfy request.
341 */
342struct ti_sci_msg_req_get_clock_num_parents {
343 struct ti_sci_msg_hdr hdr;
344 uint32_t dev_id;
345 uint8_t clk_id;
346} __packed;
347
348/**
349 * struct ti_sci_msg_resp_get_clock_num_parents - Response for get clk parents
350 * @hdr: Generic header
351 * @num_parents: Number of clock parents
352 *
353 * Response to TI_SCI_MSG_GET_NUM_CLOCK_PARENTS
354 */
355struct ti_sci_msg_resp_get_clock_num_parents {
356 struct ti_sci_msg_hdr hdr;
357 uint8_t num_parents;
358} __packed;
359
360/**
361 * struct ti_sci_msg_req_query_clock_freq - Request to query a frequency
362 * @hdr: Generic Header
363 * @dev_id: Device identifier this request is for
364 * @min_freq_hz: The minimum allowable frequency in Hz. This is the minimum
365 * allowable programmed frequency and does not account for clock
366 * tolerances and jitter.
367 * @target_freq_hz: The target clock frequency. A frequency will be found
368 * as close to this target frequency as possible.
369 * @max_freq_hz: The maximum allowable frequency in Hz. This is the maximum
370 * allowable programmed frequency and does not account for clock
371 * tolerances and jitter.
372 * @clk_id: Clock identifier for the device for this request.
373 *
374 * NOTE: Normally clock frequency management is automatically done by TISCI
375 * entity. In case of specific requests, TISCI evaluates capability to achieve
376 * requested frequency within provided range and responds with
377 * result message.
378 *
379 * Request type is TI_SCI_MSG_QUERY_CLOCK_FREQ, response is appropriate message,
380 * or NACK in case of inability to satisfy request.
381 */
382struct ti_sci_msg_req_query_clock_freq {
383 struct ti_sci_msg_hdr hdr;
384 uint32_t dev_id;
385 uint64_t min_freq_hz;
386 uint64_t target_freq_hz;
387 uint64_t max_freq_hz;
388 uint8_t clk_id;
389} __packed;
390
391/**
392 * struct ti_sci_msg_resp_query_clock_freq - Response to a clock frequency query
393 * @hdr: Generic Header
394 * @freq_hz: Frequency that is the best match in Hz.
395 *
396 * Response to request type TI_SCI_MSG_QUERY_CLOCK_FREQ. NOTE: if the request
397 * cannot be satisfied, the message will be of type NACK.
398 */
399struct ti_sci_msg_resp_query_clock_freq {
400 struct ti_sci_msg_hdr hdr;
401 uint64_t freq_hz;
402} __packed;
403
404/**
405 * struct ti_sci_msg_req_set_clock_freq - Request to setup a clock frequency
406 * @hdr: Generic Header
407 * @dev_id: Device identifier this request is for
408 * @min_freq_hz: The minimum allowable frequency in Hz. This is the minimum
409 * allowable programmed frequency and does not account for clock
410 * tolerances and jitter.
411 * @target_freq_hz: The target clock frequency. The clock will be programmed
412 * at a rate as close to this target frequency as possible.
413 * @max_freq_hz: The maximum allowable frequency in Hz. This is the maximum
414 * allowable programmed frequency and does not account for clock
415 * tolerances and jitter.
416 * @clk_id: Clock identifier for the device for this request.
417 *
418 * NOTE: Normally clock frequency management is automatically done by TISCI
419 * entity. In case of specific requests, TISCI evaluates capability to achieve
420 * requested range and responds with success/failure message.
421 *
422 * This sets the desired frequency for a clock within an allowable
423 * range. This message will fail on an enabled clock unless
424 * MSG_FLAG_CLOCK_ALLOW_FREQ_CHANGE is set for the clock. Additionally,
425 * if other clocks have their frequency modified due to this message,
426 * they also must have the MSG_FLAG_CLOCK_ALLOW_FREQ_CHANGE or be disabled.
427 *
428 * Calling set frequency on a clock input to the SoC pseudo-device will
429 * inform the PMMC of that clock's frequency. Setting a frequency of
430 * zero will indicate the clock is disabled.
431 *
432 * Calling set frequency on clock outputs from the SoC pseudo-device will
433 * function similarly to setting the clock frequency on a device.
434 *
435 * Request type is TI_SCI_MSG_SET_CLOCK_FREQ, response is a generic ACK/NACK
436 * message.
437 */
438struct ti_sci_msg_req_set_clock_freq {
439 struct ti_sci_msg_hdr hdr;
440 uint32_t dev_id;
441 uint64_t min_freq_hz;
442 uint64_t target_freq_hz;
443 uint64_t max_freq_hz;
444 uint8_t clk_id;
445} __packed;
446
447/**
448 * struct ti_sci_msg_req_get_clock_freq - Request to get the clock frequency
449 * @hdr: Generic Header
450 * @dev_id: Device identifier this request is for
451 * @clk_id: Clock identifier for the device for this request.
452 *
453 * NOTE: Normally clock frequency management is automatically done by TISCI
454 * entity. In some cases, clock frequencies are configured by host.
455 *
456 * Request type is TI_SCI_MSG_GET_CLOCK_FREQ, responded with clock frequency
457 * that the clock is currently at.
458 */
459struct ti_sci_msg_req_get_clock_freq {
460 struct ti_sci_msg_hdr hdr;
461 uint32_t dev_id;
462 uint8_t clk_id;
463} __packed;
464
465/**
466 * struct ti_sci_msg_resp_get_clock_freq - Response of clock frequency request
467 * @hdr: Generic Header
468 * @freq_hz: Frequency that the clock is currently on, in Hz.
469 *
470 * Response to request type TI_SCI_MSG_GET_CLOCK_FREQ.
471 */
472struct ti_sci_msg_resp_get_clock_freq {
473 struct ti_sci_msg_hdr hdr;
474 uint64_t freq_hz;
475} __packed;
476
477#define TISCI_ADDR_LOW_MASK 0x00000000ffffffff
478#define TISCI_ADDR_HIGH_MASK 0xffffffff00000000
479#define TISCI_ADDR_HIGH_SHIFT 32
480
481/**
482 * struct ti_sci_msg_req_proc_request - Request a processor
483 *
484 * @hdr: Generic Header
485 * @processor_id: ID of processor
486 *
487 * Request type is TISCI_MSG_PROC_REQUEST, response is a generic ACK/NACK
488 * message.
489 */
490struct ti_sci_msg_req_proc_request {
491 struct ti_sci_msg_hdr hdr;
492 uint8_t processor_id;
493} __packed;
494
495/**
496 * struct ti_sci_msg_req_proc_release - Release a processor
497 *
498 * @hdr: Generic Header
499 * @processor_id: ID of processor
500 *
501 * Request type is TISCI_MSG_PROC_RELEASE, response is a generic ACK/NACK
502 * message.
503 */
504struct ti_sci_msg_req_proc_release {
505 struct ti_sci_msg_hdr hdr;
506 uint8_t processor_id;
507} __packed;
508
509/**
510 * struct ti_sci_msg_req_proc_handover - Handover a processor to a host
511 *
512 * @hdr: Generic Header
513 * @processor_id: ID of processor
514 * @host_id: New Host we want to give control to
515 *
516 * Request type is TISCI_MSG_PROC_HANDOVER, response is a generic ACK/NACK
517 * message.
518 */
519struct ti_sci_msg_req_proc_handover {
520 struct ti_sci_msg_hdr hdr;
521 uint8_t processor_id;
522 uint8_t host_id;
523} __packed;
524
525/* A53 Config Flags */
526#define PROC_BOOT_CFG_FLAG_ARMV8_DBG_EN 0x00000001
527#define PROC_BOOT_CFG_FLAG_ARMV8_DBG_NIDEN 0x00000002
528#define PROC_BOOT_CFG_FLAG_ARMV8_DBG_SPIDEN 0x00000004
529#define PROC_BOOT_CFG_FLAG_ARMV8_DBG_SPNIDEN 0x00000008
530#define PROC_BOOT_CFG_FLAG_ARMV8_AARCH32 0x00000100
531
532/* R5 Config Flags */
533#define PROC_BOOT_CFG_FLAG_R5_DBG_EN 0x00000001
534#define PROC_BOOT_CFG_FLAG_R5_DBG_NIDEN 0x00000002
535#define PROC_BOOT_CFG_FLAG_R5_LOCKSTEP 0x00000100
536#define PROC_BOOT_CFG_FLAG_R5_TEINIT 0x00000200
537#define PROC_BOOT_CFG_FLAG_R5_NMFI_EN 0x00000400
538#define PROC_BOOT_CFG_FLAG_R5_TCM_RSTBASE 0x00000800
539#define PROC_BOOT_CFG_FLAG_R5_BTCM_EN 0x00001000
540#define PROC_BOOT_CFG_FLAG_R5_ATCM_EN 0x00002000
541
542/**
543 * struct ti_sci_msg_req_set_proc_boot_config - Set Processor boot configuration
544 * @hdr: Generic Header
545 * @processor_id: ID of processor
546 * @bootvector_low: Lower 32bit (Little Endian) of boot vector
547 * @bootvector_high: Higher 32bit (Little Endian) of boot vector
548 * @config_flags_set: Optional Processor specific Config Flags to set.
549 * Setting a bit here implies required bit sets to 1.
550 * @config_flags_clear: Optional Processor specific Config Flags to clear.
551 * Setting a bit here implies required bit gets cleared.
552 *
553 * Request type is TISCI_MSG_SET_PROC_BOOT_CONFIG, response is a generic
554 * ACK/NACK message.
555 */
556struct ti_sci_msg_req_set_proc_boot_config {
557 struct ti_sci_msg_hdr hdr;
558 uint8_t processor_id;
559 uint32_t bootvector_low;
560 uint32_t bootvector_high;
561 uint32_t config_flags_set;
562 uint32_t config_flags_clear;
563} __packed;
564
565/* R5 Control Flags */
566#define PROC_BOOT_CTRL_FLAG_R5_CORE_HALT 0x00000001
567
568/**
569 * struct ti_sci_msg_req_set_proc_boot_ctrl - Set Processor boot control flags
570 * @hdr: Generic Header
571 * @processor_id: ID of processor
572 * @config_flags_set: Optional Processor specific Config Flags to set.
573 * Setting a bit here implies required bit sets to 1.
574 * @config_flags_clear: Optional Processor specific Config Flags to clear.
575 * Setting a bit here implies required bit gets cleared.
576 *
577 * Request type is TISCI_MSG_SET_PROC_BOOT_CTRL, response is a generic ACK/NACK
578 * message.
579 */
580struct ti_sci_msg_req_set_proc_boot_ctrl {
581 struct ti_sci_msg_hdr hdr;
582 uint8_t processor_id;
583 uint32_t control_flags_set;
584 uint32_t control_flags_clear;
585} __packed;
586
587/**
588 * struct ti_sci_msg_req_proc_auth_start_image - Authenticate and start image
589 * @hdr: Generic Header
590 * @processor_id: ID of processor
591 * @cert_addr_low: Lower 32bit (Little Endian) of certificate
592 * @cert_addr_high: Higher 32bit (Little Endian) of certificate
593 *
594 * Request type is TISCI_MSG_PROC_AUTH_BOOT_IMAGE, response is a generic
595 * ACK/NACK message.
596 */
597struct ti_sci_msg_req_proc_auth_boot_image {
598 struct ti_sci_msg_hdr hdr;
599 uint8_t processor_id;
600 uint32_t cert_addr_low;
601 uint32_t cert_addr_high;
602} __packed;
603
604/**
605 * struct ti_sci_msg_req_get_proc_boot_status - Get processor boot status
606 * @hdr: Generic Header
607 * @processor_id: ID of processor
608 *
609 * Request type is TISCI_MSG_GET_PROC_BOOT_STATUS, response is appropriate
610 * message, or NACK in case of inability to satisfy request.
611 */
612struct ti_sci_msg_req_get_proc_boot_status {
613 struct ti_sci_msg_hdr hdr;
614 uint8_t processor_id;
615} __packed;
616
617/* ARMv8 Status Flags */
618#define PROC_BOOT_STATUS_FLAG_ARMV8_WFE 0x00000001
619#define PROC_BOOT_STATUS_FLAG_ARMV8_WFI 0x00000002
620
621/* R5 Status Flags */
622#define PROC_BOOT_STATUS_FLAG_R5_WFE 0x00000001
623#define PROC_BOOT_STATUS_FLAG_R5_WFI 0x00000002
624#define PROC_BOOT_STATUS_FLAG_R5_CLK_GATED 0x00000004
625#define PROC_BOOT_STATUS_FLAG_R5_LOCKSTEP_PERMITTED 0x00000100
626
627/**
628 * \brief Processor Status Response
629 * struct ti_sci_msg_resp_get_proc_boot_status - Processor boot status response
630 * @hdr: Generic Header
631 * @processor_id: ID of processor
632 * @bootvector_low: Lower 32bit (Little Endian) of boot vector
633 * @bootvector_high: Higher 32bit (Little Endian) of boot vector
634 * @config_flags: Optional Processor specific Config Flags set.
635 * @control_flags: Optional Processor specific Control Flags.
636 * @status_flags: Optional Processor specific Status Flags set.
637 *
638 * Response to TISCI_MSG_GET_PROC_BOOT_STATUS.
639 */
640struct ti_sci_msg_resp_get_proc_boot_status {
641 struct ti_sci_msg_hdr hdr;
642 uint8_t processor_id;
643 uint32_t bootvector_low;
644 uint32_t bootvector_high;
645 uint32_t config_flags;
646 uint32_t control_flags;
647 uint32_t status_flags;
648} __packed;
649
Antonio Nino Diaz5eb88372018-11-08 10:20:19 +0000650#endif /* TI_SCI_PROTOCOL_H */