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Caesar Wangd90f43e2016-10-11 09:36:00 +08001/*
2 * Copyright (c) 2016, ARM Limited and Contributors. All rights reserved.
3 *
dp-armfa3cf0b2017-05-03 09:38:09 +01004 * SPDX-License-Identifier: BSD-3-Clause
Caesar Wangd90f43e2016-10-11 09:36:00 +08005 */
Antonio Nino Diaz5eb88372018-11-08 10:20:19 +00006#ifndef ROCKCHIP_PLAT_LD_S
7#define ROCKCHIP_PLAT_LD_S
Caesar Wangd90f43e2016-10-11 09:36:00 +08008
Antonio Nino Diaz2ce2b092017-11-15 11:45:35 +00009#include <xlat_tables_defs.h>
10
Caesar Wangd90f43e2016-10-11 09:36:00 +080011MEMORY {
12 SRAM (rwx): ORIGIN = SRAM_BASE, LENGTH = SRAM_SIZE
Lin Huang30e43392017-05-04 16:02:45 +080013 PMUSRAM (rwx): ORIGIN = PMUSRAM_BASE, LENGTH = PMUSRAM_RSIZE
Caesar Wangd90f43e2016-10-11 09:36:00 +080014}
15
16SECTIONS
17{
18 . = SRAM_BASE;
Antonio Nino Diaz2ce2b092017-11-15 11:45:35 +000019 ASSERT(. == ALIGN(PAGE_SIZE),
Caesar Wangd90f43e2016-10-11 09:36:00 +080020 "SRAM_BASE address is not aligned on a page boundary.")
21
22 /*
23 * The SRAM space allocation for RK3399
24 * ----------------
Caesar Wangb4003742016-10-12 08:10:12 +080025 * | m0 code bin
26 * ----------------
Caesar Wangd90f43e2016-10-11 09:36:00 +080027 * | sram text
28 * ----------------
29 * | sram data
30 * ----------------
31 */
Antonio Nino Diaz2ce2b092017-11-15 11:45:35 +000032 .incbin_sram : ALIGN(PAGE_SIZE) {
Caesar Wangb4003742016-10-12 08:10:12 +080033 __sram_incbin_start = .;
34 *(.sram.incbin)
Lin Huang88dd1232017-05-16 16:40:46 +080035 __sram_incbin_real_end = .;
Antonio Nino Diaz2ce2b092017-11-15 11:45:35 +000036 . = ALIGN(PAGE_SIZE);
Caesar Wangb4003742016-10-12 08:10:12 +080037 __sram_incbin_end = .;
38 } >SRAM
Lin Huang88dd1232017-05-16 16:40:46 +080039 ASSERT((__sram_incbin_real_end - __sram_incbin_start) <=
40 SRAM_BIN_LIMIT, ".incbin_sram has exceeded its limit")
Caesar Wangb4003742016-10-12 08:10:12 +080041
Antonio Nino Diaz2ce2b092017-11-15 11:45:35 +000042 .text_sram : ALIGN(PAGE_SIZE) {
Caesar Wangd90f43e2016-10-11 09:36:00 +080043 __bl31_sram_text_start = .;
44 *(.sram.text)
45 *(.sram.rodata)
Lin Huang88dd1232017-05-16 16:40:46 +080046 __bl31_sram_text_real_end = .;
Antonio Nino Diaz2ce2b092017-11-15 11:45:35 +000047 . = ALIGN(PAGE_SIZE);
Caesar Wangd90f43e2016-10-11 09:36:00 +080048 __bl31_sram_text_end = .;
49 } >SRAM
Lin Huang88dd1232017-05-16 16:40:46 +080050 ASSERT((__bl31_sram_text_real_end - __bl31_sram_text_start) <=
51 SRAM_TEXT_LIMIT, ".text_sram has exceeded its limit")
Caesar Wangd90f43e2016-10-11 09:36:00 +080052
Antonio Nino Diaz2ce2b092017-11-15 11:45:35 +000053 .data_sram : ALIGN(PAGE_SIZE) {
Caesar Wangd90f43e2016-10-11 09:36:00 +080054 __bl31_sram_data_start = .;
55 *(.sram.data)
Lin Huang88dd1232017-05-16 16:40:46 +080056 __bl31_sram_data_real_end = .;
Antonio Nino Diaz2ce2b092017-11-15 11:45:35 +000057 . = ALIGN(PAGE_SIZE);
Caesar Wangd90f43e2016-10-11 09:36:00 +080058 __bl31_sram_data_end = .;
59 } >SRAM
Lin Huang88dd1232017-05-16 16:40:46 +080060 ASSERT((__bl31_sram_data_real_end - __bl31_sram_data_start) <=
61 SRAM_DATA_LIMIT, ".data_sram has exceeded its limit")
Lin Huang30e43392017-05-04 16:02:45 +080062
Antonio Nino Diaz2ce2b092017-11-15 11:45:35 +000063 .stack_sram : ALIGN(PAGE_SIZE) {
Lin Huang30e43392017-05-04 16:02:45 +080064 __bl31_sram_stack_start = .;
Antonio Nino Diaz2ce2b092017-11-15 11:45:35 +000065 . += PAGE_SIZE;
Lin Huang30e43392017-05-04 16:02:45 +080066 __bl31_sram_stack_end = .;
67 } >SRAM
68
69 . = PMUSRAM_BASE;
70
71 /*
72 * pmu_cpuson_entrypoint request address
73 * align 64K when resume, so put it in the
74 * start of pmusram
75 */
76 .pmusram : {
77 ASSERT(. == ALIGN(64 * 1024),
78 ".pmusram.entry request 64K aligned.");
79 *(.pmusram.entry)
Lin Huang00960ba2018-04-20 15:55:21 +080080
Lin Huang30e43392017-05-04 16:02:45 +080081 __bl31_pmusram_text_start = .;
82 *(.pmusram.text)
83 *(.pmusram.rodata)
84 __bl31_pmusram_text_end = .;
Lin Huang00960ba2018-04-20 15:55:21 +080085
86 /* M0 start address request 4K align */
87 . = ALIGN(4096);
88 __pmusram_incbin_start = .;
89 *(.pmusram.incbin)
90 __pmusram_incbin_end = .;
91
Lin Huang30e43392017-05-04 16:02:45 +080092 __bl31_pmusram_data_start = .;
93 *(.pmusram.data)
94 __bl31_pmusram_data_end = .;
Lin Huang30e43392017-05-04 16:02:45 +080095 } >PMUSRAM
Caesar Wangd90f43e2016-10-11 09:36:00 +080096}
97
Antonio Nino Diaz5eb88372018-11-08 10:20:19 +000098#endif /* ROCKCHIP_PLAT_LD_S */