Konstantin Porotchkin | e7be6e2 | 2018-10-08 16:53:09 +0300 | [diff] [blame] | 1 | /* |
| 2 | * Copyright (C) 2018 Marvell International Ltd. |
| 3 | * |
| 4 | * SPDX-License-Identifier: BSD-3-Clause |
| 5 | * https://spdx.org/licenses |
| 6 | */ |
| 7 | |
Antonio Nino Diaz | 5eb8837 | 2018-11-08 10:20:19 +0000 | [diff] [blame^] | 8 | #ifndef IO_ADDR_DEC_H |
| 9 | #define IO_ADDR_DEC_H |
Konstantin Porotchkin | e7be6e2 | 2018-10-08 16:53:09 +0300 | [diff] [blame] | 10 | |
| 11 | #include <stdint.h> |
| 12 | |
| 13 | /* There are 5 configurable cpu decoder windows. */ |
| 14 | #define DRAM_WIN_MAP_NUM_MAX 5 |
| 15 | /* Target number for dram in cpu decoder windows. */ |
| 16 | #define DRAM_CPU_DEC_TARGET_NUM 0 |
| 17 | |
| 18 | /* |
| 19 | * Not all configurable decode windows could be used for dram, some units have |
| 20 | * to reserve one decode window for other unit they have to communicate with; |
| 21 | * for example, DMA engineer has 3 configurable windows, but only two could be |
| 22 | * for dram while the last one has to be for pcie, so for DMA, its max_dram_win |
| 23 | * is 2. |
| 24 | */ |
| 25 | struct dec_win_config { |
| 26 | uint32_t dec_reg_base; /* IO address decoder register base address */ |
| 27 | uint32_t win_attr; /* IO address decoder windows attributes */ |
| 28 | /* How many configurable dram decoder windows that this unit has; */ |
| 29 | uint32_t max_dram_win; |
| 30 | /* The decoder windows number including remapping that this unit has */ |
| 31 | uint32_t max_remap; |
| 32 | /* The offset between continuous decode windows |
| 33 | * within the same unit, typically 0x10 |
| 34 | */ |
| 35 | uint32_t win_offset; |
| 36 | }; |
| 37 | |
| 38 | struct dram_win { |
| 39 | uintptr_t base_addr; |
| 40 | uintptr_t win_size; |
| 41 | }; |
| 42 | |
| 43 | struct dram_win_map { |
| 44 | int dram_win_num; |
| 45 | struct dram_win dram_windows[DRAM_WIN_MAP_NUM_MAX]; |
| 46 | }; |
| 47 | |
| 48 | /* |
| 49 | * init_io_addr_dec |
| 50 | * |
| 51 | * This function initializes io address decoder windows by |
| 52 | * cpu dram window mapping information |
| 53 | * |
| 54 | * @input: N/A |
| 55 | * - dram_wins_map: cpu dram windows mapping |
| 56 | * - io_dec_config: io address decoder windows configuration |
| 57 | * - io_unit_num: io address decoder unit number |
| 58 | * @output: N/A |
| 59 | * |
| 60 | * @return: 0 on success and others on failure |
| 61 | */ |
| 62 | int init_io_addr_dec(struct dram_win_map *dram_wins_map, |
| 63 | struct dec_win_config *io_dec_config, |
| 64 | uint32_t io_unit_num); |
| 65 | |
Antonio Nino Diaz | 5eb8837 | 2018-11-08 10:20:19 +0000 | [diff] [blame^] | 66 | #endif /* IO_ADDR_DEC_H */ |