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Etienne Carriere09d26a62017-11-05 22:56:50 +01001/*
2 * Copyright (c) 2017, ARM Limited and Contributors. All rights reserved.
3 *
4 * SPDX-License-Identifier: BSD-3-Clause
5 */
6
Antonio Nino Diaz5eb88372018-11-08 10:20:19 +00007#ifndef CORTEX_A12_H
8#define CORTEX_A12_H
Etienne Carriere09d26a62017-11-05 22:56:50 +01009
10/*******************************************************************************
11 * Cortex-A12 midr with version/revision set to 0
12 ******************************************************************************/
13#define CORTEX_A12_MIDR 0x410FC0C0
14
15/*******************************************************************************
16 * CPU Auxiliary Control register specific definitions.
17 ******************************************************************************/
18#define CORTEX_A12_ACTLR_SMP_BIT (1 << 6)
19
Antonio Nino Diaz5eb88372018-11-08 10:20:19 +000020#endif /* CORTEX_A12_H */