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Achin Gupta07f4e072014-02-02 12:02:23 +00001/*
2 * Copyright (c) 2013-2014, ARM Limited and Contributors. All rights reserved.
3 *
4 * Redistribution and use in source and binary forms, with or without
5 * modification, are permitted provided that the following conditions are met:
6 *
7 * Redistributions of source code must retain the above copyright notice, this
8 * list of conditions and the following disclaimer.
9 *
10 * Redistributions in binary form must reproduce the above copyright notice,
11 * this list of conditions and the following disclaimer in the documentation
12 * and/or other materials provided with the distribution.
13 *
14 * Neither the name of ARM nor the names of its contributors may be used
15 * to endorse or promote products derived from this software without specific
16 * prior written permission.
17 *
18 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
19 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
20 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
21 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
22 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
23 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
24 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
25 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
26 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
27 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
28 * POSSIBILITY OF SUCH DAMAGE.
29 */
Dan Handley2bd4ef22014-04-09 13:14:54 +010030#include <arch.h>
31#include <context.h>
32
Achin Gupta07f4e072014-02-02 12:02:23 +000033 /* -----------------------------------------------------
34 * Handle SMC exceptions seperately from other sync.
35 * exceptions.
36 * -----------------------------------------------------
37 */
38 .macro handle_sync_exception
Soby Mathew6c5192a2014-04-30 15:36:37 +010039 str x30, [sp, #CTX_GPREGS_OFFSET + CTX_GPREG_LR]
Achin Gupta07f4e072014-02-02 12:02:23 +000040 mrs x30, esr_el3
41 ubfx x30, x30, #ESR_EC_SHIFT, #ESR_EC_LENGTH
42
43 cmp x30, #EC_AARCH32_SMC
44 b.eq smc_handler32
45
46 cmp x30, #EC_AARCH64_SMC
47 b.eq smc_handler64
48
49 /* -----------------------------------------------------
50 * The following code handles any synchronous exception
Soby Mathew5e5c2072014-04-07 15:28:55 +010051 * that is not an SMC.
Achin Gupta07f4e072014-02-02 12:02:23 +000052 * -----------------------------------------------------
53 */
Achin Gupta07f4e072014-02-02 12:02:23 +000054
Soby Mathew5e5c2072014-04-07 15:28:55 +010055 bl dump_state_and_die
Achin Gupta07f4e072014-02-02 12:02:23 +000056 .endm
57