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Vikram Kanigiri40d468c2014-12-23 01:00:22 +00001/*
Antonio Nino Diaz3207e942017-04-06 14:46:38 +01002 * Copyright (c) 2015-2017, ARM Limited and Contributors. All rights reserved.
Vikram Kanigiri40d468c2014-12-23 01:00:22 +00003 *
dp-armfa3cf0b2017-05-03 09:38:09 +01004 * SPDX-License-Identifier: BSD-3-Clause
Vikram Kanigiri40d468c2014-12-23 01:00:22 +00005 */
6
7#include <arch.h>
Roberto Vargasbd7bcd82018-07-18 11:14:20 +01008#include <arch_helpers.h>
Vikram Kanigiri40d468c2014-12-23 01:00:22 +00009#include <assert.h>
10#include <cci.h>
11#include <debug.h>
12#include <mmio.h>
Juan Castillo7f1f0622014-09-09 09:49:23 +010013#include <stdint.h>
Vikram Kanigiri40d468c2014-12-23 01:00:22 +000014
Jeenu Viswambharanb36577a2017-07-19 17:07:00 +010015#define MAKE_CCI_PART_NUMBER(hi, lo) ((hi << 8) | lo)
16#define CCI_PART_LO_MASK 0xff
17#define CCI_PART_HI_MASK 0xf
18
19/* CCI part number codes read from Peripheral ID registers 0 and 1 */
20#define CCI400_PART_NUM 0x420
21#define CCI500_PART_NUM 0x422
22#define CCI550_PART_NUM 0x423
23
24#define CCI400_SLAVE_PORTS 5
25#define CCI500_SLAVE_PORTS 7
26#define CCI550_SLAVE_PORTS 7
27
28static uintptr_t cci_base;
29static const int *cci_slave_if_map;
Vikram Kanigiri40d468c2014-12-23 01:00:22 +000030
Antonio Nino Diaz3759e3f2017-03-22 15:48:51 +000031#if ENABLE_ASSERTIONS
Jeenu Viswambharanb36577a2017-07-19 17:07:00 +010032static unsigned int max_master_id;
33static int cci_num_slave_ports;
34
Vikram Kanigiri40d468c2014-12-23 01:00:22 +000035static int validate_cci_map(const int *map)
36{
37 unsigned int valid_cci_map = 0;
38 int slave_if_id;
39 int i;
40
41 /* Validate the map */
Jeenu Viswambharanb36577a2017-07-19 17:07:00 +010042 for (i = 0; i <= max_master_id; i++) {
Vikram Kanigiri40d468c2014-12-23 01:00:22 +000043 slave_if_id = map[i];
44
45 if (slave_if_id < 0)
46 continue;
47
Jeenu Viswambharanb36577a2017-07-19 17:07:00 +010048 if (slave_if_id >= cci_num_slave_ports) {
Antonio Nino Diaz3207e942017-04-06 14:46:38 +010049 ERROR("Slave interface ID is invalid\n");
Vikram Kanigiri40d468c2014-12-23 01:00:22 +000050 return 0;
51 }
52
53 if (valid_cci_map & (1 << slave_if_id)) {
Antonio Nino Diaz3207e942017-04-06 14:46:38 +010054 ERROR("Multiple masters are assigned same slave interface ID\n");
Vikram Kanigiri40d468c2014-12-23 01:00:22 +000055 return 0;
56 }
57 valid_cci_map |= 1 << slave_if_id;
58 }
59
60 if (!valid_cci_map) {
Antonio Nino Diaz3207e942017-04-06 14:46:38 +010061 ERROR("No master is assigned a valid slave interface\n");
Vikram Kanigiri40d468c2014-12-23 01:00:22 +000062 return 0;
63 }
64
65 return 1;
66}
Jeenu Viswambharanb36577a2017-07-19 17:07:00 +010067
68/*
69 * Read CCI part number from Peripheral ID registers
70 */
71static unsigned int read_cci_part_number(uintptr_t base)
72{
73 unsigned int part_lo, part_hi;
74
75 part_lo = mmio_read_32(base + PERIPHERAL_ID0) & CCI_PART_LO_MASK;
76 part_hi = mmio_read_32(base + PERIPHERAL_ID1) & CCI_PART_HI_MASK;
77
78 return MAKE_CCI_PART_NUMBER(part_hi, part_lo);
79}
80
81/*
82 * Identify a CCI device, and return the number of slaves. Return -1 for an
83 * unidentified device.
84 */
85static int get_slave_ports(unsigned int part_num)
86{
Jonathan Wright39b42212018-03-13 15:24:29 +000087 int num_slave_ports = -1;
Jeenu Viswambharanb36577a2017-07-19 17:07:00 +010088
89 switch (part_num) {
90
Jonathan Wright39b42212018-03-13 15:24:29 +000091 case CCI400_PART_NUM:
92 num_slave_ports = CCI400_SLAVE_PORTS;
93 break;
94 case CCI500_PART_NUM:
95 num_slave_ports = CCI500_SLAVE_PORTS;
96 break;
97 case CCI550_PART_NUM:
98 num_slave_ports = CCI550_SLAVE_PORTS;
99 break;
Jeenu Viswambharanb36577a2017-07-19 17:07:00 +0100100 default:
Jonathan Wright39b42212018-03-13 15:24:29 +0000101 /* Do nothing in default case */
102 break;
Jeenu Viswambharanb36577a2017-07-19 17:07:00 +0100103 }
104
Jonathan Wright39b42212018-03-13 15:24:29 +0000105 return num_slave_ports;
Jeenu Viswambharanb36577a2017-07-19 17:07:00 +0100106}
Antonio Nino Diaz3759e3f2017-03-22 15:48:51 +0000107#endif /* ENABLE_ASSERTIONS */
Vikram Kanigiri40d468c2014-12-23 01:00:22 +0000108
Jeenu Viswambharanb36577a2017-07-19 17:07:00 +0100109void cci_init(uintptr_t base, const int *map, unsigned int num_cci_masters)
Vikram Kanigiri40d468c2014-12-23 01:00:22 +0000110{
111 assert(map);
Jeenu Viswambharanb36577a2017-07-19 17:07:00 +0100112 assert(base);
Vikram Kanigiri40d468c2014-12-23 01:00:22 +0000113
Jeenu Viswambharanb36577a2017-07-19 17:07:00 +0100114 cci_base = base;
115 cci_slave_if_map = map;
Vikram Kanigiri40d468c2014-12-23 01:00:22 +0000116
Jeenu Viswambharanb36577a2017-07-19 17:07:00 +0100117#if ENABLE_ASSERTIONS
Vikram Kanigiri40d468c2014-12-23 01:00:22 +0000118 /*
119 * Master Id's are assigned from zero, So in an array of size n
120 * the max master id is (n - 1).
121 */
Jeenu Viswambharanb36577a2017-07-19 17:07:00 +0100122 max_master_id = num_cci_masters - 1;
123 cci_num_slave_ports = get_slave_ports(read_cci_part_number(base));
124#endif
125 assert(cci_num_slave_ports >= 0);
Vikram Kanigiri40d468c2014-12-23 01:00:22 +0000126
127 assert(validate_cci_map(map));
Vikram Kanigiri40d468c2014-12-23 01:00:22 +0000128}
129
130void cci_enable_snoop_dvm_reqs(unsigned int master_id)
131{
Jeenu Viswambharanb36577a2017-07-19 17:07:00 +0100132 int slave_if_id = cci_slave_if_map[master_id];
Vikram Kanigiri40d468c2014-12-23 01:00:22 +0000133
Jeenu Viswambharanb36577a2017-07-19 17:07:00 +0100134 assert(master_id <= max_master_id);
135 assert((slave_if_id < cci_num_slave_ports) && (slave_if_id >= 0));
136 assert(cci_base);
Vikram Kanigiri40d468c2014-12-23 01:00:22 +0000137
138 /*
139 * Enable Snoops and DVM messages, no need for Read/Modify/Write as
140 * rest of bits are write ignore
141 */
Jeenu Viswambharanb36577a2017-07-19 17:07:00 +0100142 mmio_write_32(cci_base +
143 SLAVE_IFACE_OFFSET(slave_if_id) + SNOOP_CTRL_REG,
144 DVM_EN_BIT | SNOOP_EN_BIT);
Vikram Kanigiri40d468c2014-12-23 01:00:22 +0000145
Roberto Vargasbd7bcd82018-07-18 11:14:20 +0100146 /*
147 * Wait for the completion of the write to the Snoop Control Register
148 * before testing the change_pending bit
149 */
150 dmbish();
151
Vikram Kanigiri40d468c2014-12-23 01:00:22 +0000152 /* Wait for the dust to settle down */
Jeenu Viswambharanb36577a2017-07-19 17:07:00 +0100153 while (mmio_read_32(cci_base + STATUS_REG) & CHANGE_PENDING_BIT)
Vikram Kanigiri40d468c2014-12-23 01:00:22 +0000154 ;
155}
156
157void cci_disable_snoop_dvm_reqs(unsigned int master_id)
158{
Jeenu Viswambharanb36577a2017-07-19 17:07:00 +0100159 int slave_if_id = cci_slave_if_map[master_id];
Vikram Kanigiri40d468c2014-12-23 01:00:22 +0000160
Jeenu Viswambharanb36577a2017-07-19 17:07:00 +0100161 assert(master_id <= max_master_id);
162 assert((slave_if_id < cci_num_slave_ports) && (slave_if_id >= 0));
163 assert(cci_base);
Vikram Kanigiri40d468c2014-12-23 01:00:22 +0000164
165 /*
166 * Disable Snoops and DVM messages, no need for Read/Modify/Write as
167 * rest of bits are write ignore.
168 */
Jeenu Viswambharanb36577a2017-07-19 17:07:00 +0100169 mmio_write_32(cci_base +
170 SLAVE_IFACE_OFFSET(slave_if_id) + SNOOP_CTRL_REG,
171 ~(DVM_EN_BIT | SNOOP_EN_BIT));
Vikram Kanigiri40d468c2014-12-23 01:00:22 +0000172
Roberto Vargasbd7bcd82018-07-18 11:14:20 +0100173 /*
174 * Wait for the completion of the write to the Snoop Control Register
175 * before testing the change_pending bit
176 */
177 dmbish();
178
Vikram Kanigiri40d468c2014-12-23 01:00:22 +0000179 /* Wait for the dust to settle down */
Jeenu Viswambharanb36577a2017-07-19 17:07:00 +0100180 while (mmio_read_32(cci_base + STATUS_REG) & CHANGE_PENDING_BIT)
Vikram Kanigiri40d468c2014-12-23 01:00:22 +0000181 ;
182}
183