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Paul Beesley606d8072019-03-13 13:58:02 +0000[diff] [blame]1Glossary
2========
3
4This glossary provides definitions for terms and abbreviations used in the TF-A
5documentation.
6
7You can find additional definitions in the `Arm Glossary`_.
8
9.. glossary::
10 :sorted:
11
12 AArch32
13 32-bit execution state of the ARMv8 ISA
14
15 AArch64
16 64-bit execution state of the ARMv8 ISA
17
18 API
19 Application Programming Interface
20
Manish V Badarkhea59fa012020-07-31 08:38:49 +0100[diff] [blame]21 AT
22 Address Translation
23
Paul Beesley2145bf42019-10-17 13:19:02 +0000[diff] [blame]24 BTI
25 Branch Target Identification. An Armv8.5 extension providing additional
26 control flow integrity around indirect branches and their targets.
27
Paul Beesley606d8072019-03-13 13:58:02 +0000[diff] [blame]28 CoT
29 COT
30 Chain of Trust
31
32 CSS
33 Compute Sub-System
34
35 CVE
36 Common Vulnerabilities and Exposures. A CVE document is commonly used to
37 describe a publicly-known security vulnerability.
38
39 DS-5
40 Arm Development Studio 5
41
Paul Beesley2145bf42019-10-17 13:19:02 +0000[diff] [blame]42 DSU
43 DynamIQ Shared Unit
44
Paul Beesley606d8072019-03-13 13:58:02 +0000[diff] [blame]45 DT
46 Device Tree
47
Louis Mayencourt8ac387c2019-11-08 15:09:15 +0000[diff] [blame]48 DTB
49 Device Tree Blob
50
Paul Beesley606d8072019-03-13 13:58:02 +0000[diff] [blame]51 EL
52 Exception Level
53
54 EHF
55 Exception Handling Framework
56
Louis Mayencourt8ac387c2019-11-08 15:09:15 +0000[diff] [blame]57 FCONF
58 Firmware Configuration Framework
59
Paul Beesley606d8072019-03-13 13:58:02 +0000[diff] [blame]60 FDT
61 Flattened Device Tree
62
Olivier Deprez2b0be752021-09-01 10:25:21 +0200[diff] [blame]63 FF-A
64 Firmware Framework for Arm A-profile
J-Alves2672cde2020-05-07 18:42:25 +0100[diff] [blame]65
Paul Beesley606d8072019-03-13 13:58:02 +0000[diff] [blame]66 FIP
67 Firmware Image Package
68
69 FVP
70 Fixed Virtual Platform
71
72 FWU
73 FirmWare Update
74
75 GIC
76 Generic Interrupt Controller
77
78 ISA
79 Instruction Set Architecture
80
81 Linaro
82 A collaborative engineering organization consolidating
83 and optimizing open source software and tools for the Arm architecture.
84
85 MMU
86 Memory Management Unit
87
88 MPAM
89 Memory Partitioning And Monitoring. An optional Armv8.4 extension.
90
91 MPIDR
92 Multiprocessor Affinity Register
93
Paul Beesley2145bf42019-10-17 13:19:02 +0000[diff] [blame]94 MTE
95 Memory Tagging Extension. An optional Armv8.5 extension that enables
96 hardware-assisted memory tagging.
97
Paul Beesley606d8072019-03-13 13:58:02 +0000[diff] [blame]98 OEN
99 Owning Entity Number
100
101 OP-TEE
102 Open Portable Trusted Execution Environment. An example of a :term:`TEE`
103
104 OTE
105 Open-source Trusted Execution Environment
106
107 PDD
108 Platform Design Document
109
Paul Beesley2145bf42019-10-17 13:19:02 +0000[diff] [blame]110 PAUTH
111 Pointer Authentication. An optional extension introduced in Armv8.3.
112
Paul Beesley606d8072019-03-13 13:58:02 +0000[diff] [blame]113 PMF
114 Performance Measurement Framework
115
J-Alves2672cde2020-05-07 18:42:25 +0100[diff] [blame]116 PSA
117 Platform Security Architecture
118
Paul Beesley606d8072019-03-13 13:58:02 +0000[diff] [blame]119 PSCI
120 Power State Coordination Interface
121
122 RAS
123 Reliability, Availability, and Serviceability extensions. A mandatory
124 extension for the Armv8.2 architecture and later. An optional extension to
125 the base Armv8 architecture.
126
127 ROT
128 Root of Trust
129
130 SCMI
131 System Control and Management Interface
132
133 SCP
134 System Control Processor
135
136 SDEI
137 Software Delegated Exception Interface
138
139 SDS
140 Shared Data Storage
141
142 SEA
143 Synchronous External Abort
144
145 SiP
146 SIP
147 Silicon Provider
148
149 SMC
150 Secure Monitor Call
151
152 SMCCC
153 :term:`SMC` Calling Convention
154
155 SoC
156 System on Chip
157
158 SP
159 Secure Partition
160
Paul Beesley606d8072019-03-13 13:58:02 +0000[diff] [blame]161 SPD
162 Secure Payload Dispatcher
163
164 SPM
165 Secure Partition Manager
166
Paul Beesley2145bf42019-10-17 13:19:02 +0000[diff] [blame]167 SSBS
168 Speculative Store Bypass Safe. Introduced in Armv8.5, this configuration
169 bit can be set by software to allow or prevent the hardware from
170 performing speculative operations.
171
Paul Beesley606d8072019-03-13 13:58:02 +0000[diff] [blame]172 SVE
173 Scalable Vector Extension
174
175 TBB
176 Trusted Board Boot
177
178 TBBR
179 Trusted Board Boot Requirements
180
181 TEE
182 Trusted Execution Environment
183
184 TF-A
185 Trusted Firmware-A
186
187 TF-M
188 Trusted Firmware-M
189
190 TLB
191 Translation Lookaside Buffer
192
193 TLK
194 Trusted Little Kernel. A Trusted OS from NVIDIA.
195
Jimmy Brisson26c5b5c2020-06-22 14:18:42 -0500[diff] [blame]196 TRNG
197 True Randon Number Generator (hardware based)
198
Paul Beesley606d8072019-03-13 13:58:02 +0000[diff] [blame]199 TSP
200 Test Secure Payload
201
202 TZC
203 TrustZone Controller
204
Paul Beesley2145bf42019-10-17 13:19:02 +0000[diff] [blame]205 UBSAN
206 Undefined Behavior Sanitizer
207
Paul Beesley606d8072019-03-13 13:58:02 +0000[diff] [blame]208 UEFI
209 Unified Extensible Firmware Interface
210
211 WDOG
212 Watchdog
213
214 XLAT
215 Translation (abbr.). For example, "XLAT table".
216
Paul Beesley2145bf42019-10-17 13:19:02 +0000[diff] [blame]217.. _`Arm Glossary`: https://developer.arm.com/support/arm-glossary