blob: c2dca1fcb3578de16d21c54046703ce80ddb9a8a [file] [log] [blame]
Tony Xief6118cc2016-01-15 17:17:32 +08001/*
2 * Copyright (c) 2016, ARM Limited and Contributors. All rights reserved.
3 *
4 * Redistribution and use in source and binary forms, with or without
5 * modification, are permitted provided that the following conditions are met:
6 *
7 * Redistributions of source code must retain the above copyright notice, this
8 * list of conditions and the following disclaimer.
9 *
10 * Redistributions in binary form must reproduce the above copyright notice,
11 * this list of conditions and the following disclaimer in the documentation
12 * and/or other materials provided with the distribution.
13 *
14 * Neither the name of ARM nor the names of its contributors may be used
15 * to endorse or promote products derived from this software without specific
16 * prior written permission.
17 *
18 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
19 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
20 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
21 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
22 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
23 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
24 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
25 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
26 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
27 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
28 * POSSIBILITY OF SUCH DAMAGE.
29 */
30
31#include <bl_common.h>
32#include <gicv2.h>
33#include <platform_def.h>
Sandrine Bailleux7659a262016-07-05 09:55:03 +010034#include <utils.h>
Tony Xief6118cc2016-01-15 17:17:32 +080035
36/******************************************************************************
37 * The following functions are defined as weak to allow a platform to override
38 * the way the GICv2 driver is initialised and used.
39 *****************************************************************************/
40#pragma weak plat_rockchip_gic_driver_init
41#pragma weak plat_rockchip_gic_init
42#pragma weak plat_rockchip_gic_cpuif_enable
43#pragma weak plat_rockchip_gic_cpuif_disable
44#pragma weak plat_rockchip_gic_pcpu_init
45
46/******************************************************************************
47 * On a GICv2 system, the Group 1 secure interrupts are treated as Group 0
48 * interrupts.
49 *****************************************************************************/
50const unsigned int g0_interrupt_array[] = {
51 PLAT_RK_G1S_IRQS,
52};
53
54/*
55 * Ideally `rockchip_gic_data` structure definition should be a `const` but it
56 * is kept as modifiable for overwriting with different GICD and GICC base when
57 * running on FVP with VE memory map.
58 */
59gicv2_driver_data_t rockchip_gic_data = {
60 .gicd_base = PLAT_RK_GICD_BASE,
61 .gicc_base = PLAT_RK_GICC_BASE,
62 .g0_interrupt_num = ARRAY_SIZE(g0_interrupt_array),
63 .g0_interrupt_array = g0_interrupt_array,
64};
65
66/******************************************************************************
67 * RockChip common helper to initialize the GICv2 only driver.
68 *****************************************************************************/
69void plat_rockchip_gic_driver_init(void)
70{
71 gicv2_driver_init(&rockchip_gic_data);
72}
73
74void plat_rockchip_gic_init(void)
75{
76 gicv2_distif_init();
77 gicv2_pcpu_distif_init();
78 gicv2_cpuif_enable();
79}
80
81/******************************************************************************
82 * RockChip common helper to enable the GICv2 CPU interface
83 *****************************************************************************/
84void plat_rockchip_gic_cpuif_enable(void)
85{
86 gicv2_cpuif_enable();
87}
88
89/******************************************************************************
90 * RockChip common helper to disable the GICv2 CPU interface
91 *****************************************************************************/
92void plat_rockchip_gic_cpuif_disable(void)
93{
94 gicv2_cpuif_disable();
95}
96
97/******************************************************************************
98 * RockChip common helper to initialize the per cpu distributor interface
99 * in GICv2
100 *****************************************************************************/
101void plat_rockchip_gic_pcpu_init(void)
102{
103 gicv2_pcpu_distif_init();
104}