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Dan Handley9df48042015-03-19 18:58:55 +00001/*
Summer Qin93c812f2017-02-28 16:46:17 +00002 * Copyright (c) 2015-2017, ARM Limited and Contributors. All rights reserved.
Dan Handley9df48042015-03-19 18:58:55 +00003 *
4 * Redistribution and use in source and binary forms, with or without
5 * modification, are permitted provided that the following conditions are met:
6 *
7 * Redistributions of source code must retain the above copyright notice, this
8 * list of conditions and the following disclaimer.
9 *
10 * Redistributions in binary form must reproduce the above copyright notice,
11 * this list of conditions and the following disclaimer in the documentation
12 * and/or other materials provided with the distribution.
13 *
14 * Neither the name of ARM nor the names of its contributors may be used
15 * to endorse or promote products derived from this software without specific
16 * prior written permission.
17 *
18 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
19 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
20 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
21 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
22 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
23 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
24 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
25 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
26 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
27 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
28 * POSSIBILITY OF SUCH DAMAGE.
29 */
30
31#include <arch.h>
Soby Mathewfec4eb72015-07-01 16:16:20 +010032#include <plat_arm.h>
Dan Handley9df48042015-03-19 18:58:55 +000033#include <platform_def.h>
34
Soby Mathewfec4eb72015-07-01 16:16:20 +010035/*******************************************************************************
36 * This function validates an MPIDR by checking whether it falls within the
37 * acceptable bounds. An error code (-1) is returned if an incorrect mpidr
38 * is passed.
39 ******************************************************************************/
40int arm_check_mpidr(u_register_t mpidr)
Dan Handley9df48042015-03-19 18:58:55 +000041{
Soby Mathewfec4eb72015-07-01 16:16:20 +010042 unsigned int cluster_id, cpu_id;
Summer Qin93c812f2017-02-28 16:46:17 +000043 uint64_t valid_mask;
Soby Mathewfec4eb72015-07-01 16:16:20 +010044
Summer Qin93c812f2017-02-28 16:46:17 +000045#if ARM_PLAT_MT
46 unsigned int pe_id;
Soby Mathewfec4eb72015-07-01 16:16:20 +010047
Summer Qin93c812f2017-02-28 16:46:17 +000048 valid_mask = ~(MPIDR_AFFLVL_MASK |
49 (MPIDR_AFFLVL_MASK << MPIDR_AFF1_SHIFT) |
50 (MPIDR_AFFLVL_MASK << MPIDR_AFF2_SHIFT));
51 cluster_id = (mpidr >> MPIDR_AFF2_SHIFT) & MPIDR_AFFLVL_MASK;
52 cpu_id = (mpidr >> MPIDR_AFF1_SHIFT) & MPIDR_AFFLVL_MASK;
53 pe_id = (mpidr >> MPIDR_AFF0_SHIFT) & MPIDR_AFFLVL_MASK;
54#else
55 valid_mask = ~(MPIDR_CLUSTER_MASK | MPIDR_CPU_MASK);
Soby Mathewfec4eb72015-07-01 16:16:20 +010056 cluster_id = (mpidr >> MPIDR_AFF1_SHIFT) & MPIDR_AFFLVL_MASK;
57 cpu_id = (mpidr >> MPIDR_AFF0_SHIFT) & MPIDR_AFFLVL_MASK;
Summer Qin93c812f2017-02-28 16:46:17 +000058#endif /* ARM_PLAT_MT */
59
60 mpidr &= MPIDR_AFFINITY_MASK;
61 if (mpidr & valid_mask)
62 return -1;
Soby Mathewfec4eb72015-07-01 16:16:20 +010063
Soby Mathew47e43f22016-02-01 14:04:34 +000064 if (cluster_id >= PLAT_ARM_CLUSTER_COUNT)
Soby Mathewfec4eb72015-07-01 16:16:20 +010065 return -1;
66
67 /* Validate cpu_id by checking whether it represents a CPU in
68 one of the two clusters present on the platform. */
Soby Mathew47e43f22016-02-01 14:04:34 +000069 if (cpu_id >= plat_arm_get_cluster_core_count(mpidr))
Soby Mathewfec4eb72015-07-01 16:16:20 +010070 return -1;
71
Summer Qin93c812f2017-02-28 16:46:17 +000072#if ARM_PLAT_MT
73 if (pe_id >= plat_arm_get_cpu_pe_count(mpidr))
74 return -1;
75#endif /* ARM_PLAT_MT */
76
Soby Mathewfec4eb72015-07-01 16:16:20 +010077 return 0;
Dan Handley9df48042015-03-19 18:58:55 +000078}