| Harrison Mutai | 1a72975 | 2023-03-08 12:01:48 +0000 | [diff] [blame] | 1 | Runtime Instrumentation Methodology |
| 2 | =================================== |
| 3 | |
| 4 | This document outlines steps for undertaking performance measurements of key |
| 5 | operations in the Trusted Firmware-A Power State Coordination Interface (PSCI) |
| 6 | implementation, using the in-built Performance Measurement Framework (PMF) and |
| 7 | runtime instrumentation timestamps. |
| 8 | |
| 9 | Framework |
| 10 | ~~~~~~~~~ |
| 11 | |
| 12 | The tests are based on the ``runtime-instrumentation`` test suite provided by |
| 13 | the Trusted Firmware Test Framework (TFTF). The release build of this framework |
| 14 | was used because the results in the debug build became skewed; the console |
| 15 | output prevented some of the tests from executing in parallel. |
| 16 | |
| 17 | The tests consist of both parallel and sequential tests, which are broadly |
| 18 | described as follows: |
| 19 | |
| 20 | - **Parallel Tests** This type of test powers on all the non-lead CPUs and |
| 21 | brings them and the lead CPU to a common synchronization point. The lead CPU |
| 22 | then initiates the test on all CPUs in parallel. |
| 23 | |
| 24 | - **Sequential Tests** This type of test powers on each non-lead CPU in |
| 25 | sequence. The lead CPU initiates the test on a non-lead CPU then waits for the |
| 26 | test to complete before proceeding to the next non-lead CPU. The lead CPU then |
| 27 | executes the test on itself. |
| 28 | |
| 29 | Note there is very little variance observed in the values given (~1us), although |
| 30 | the values for each CPU are sometimes interchanged, depending on the order in |
| 31 | which locks are acquired. Also, there is very little variance observed between |
| 32 | executing the tests sequentially in a single boot or rebooting between tests. |
| 33 | |
| 34 | Given that runtime instrumentation using PMF is invasive, there is a small |
| 35 | (unquantified) overhead on the results. PMF uses the generic counter for |
| 36 | timestamps, which runs at 50MHz on Juno. |
| 37 | |
| 38 | Metrics |
| 39 | ~~~~~~~ |
| 40 | |
| 41 | .. glossary:: |
| 42 | |
| 43 | Powerdown Latency |
| 44 | Time taken from entering the TF PSCI implementation to the point the hardware |
| 45 | enters the low power state (WFI). Referring to the TF runtime instrumentation points, this |
| 46 | corresponds to: ``(RT_INSTR_ENTER_HW_LOW_PWR - RT_INSTR_ENTER_PSCI)``. |
| 47 | |
| 48 | Wakeup Latency |
| 49 | Time taken from the point the hardware exits the low power state to exiting |
| 50 | the TF PSCI implementation. This corresponds to: ``(RT_INSTR_EXIT_PSCI - |
| 51 | RT_INSTR_EXIT_HW_LOW_PWR)``. |
| 52 | |
| 53 | Cache Flush Latency |
| 54 | Time taken to flush the caches during powerdown. This corresponds to: |
| 55 | ``(RT_INSTR_EXIT_CFLUSH - RT_INSTR_ENTER_CFLUSH)``. |