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Hadi Asyrafi616da772019-06-27 11:34:03 +08001/*
2 * Copyright (c) 2019, Intel Corporation. All rights reserved.
3 *
4 * SPDX-License-Identifier: BSD-3-Clause
5 */
6
Hadi Asyrafi6f8a2b22019-10-23 18:34:14 +08007#ifndef SOCFPGA_MBOX_H
8#define SOCFPGA_MBOX_H
Hadi Asyrafi616da772019-06-27 11:34:03 +08009
Ambroise Vincenta724e432019-07-23 11:10:27 +010010#include <lib/utils_def.h>
11
Hadi Asyrafi616da772019-06-27 11:34:03 +080012#define MBOX_OFFSET 0xffa30000
13
Tien Hock, Loh527234a2019-10-30 14:54:25 +080014#define MBOX_MAX_JOB_ID 0xf
Hadi Asyrafi616da772019-06-27 11:34:03 +080015#define MBOX_ATF_CLIENT_ID 0x1
16#define MBOX_JOB_ID 0x1
17
18/* Mailbox interrupt flags and masks */
19#define MBOX_INT_FLAG_COE 0x1
20#define MBOX_INT_FLAG_RIE 0x2
21#define MBOX_INT_FLAG_UAE 0x100
22#define MBOX_COE_BIT(INTERRUPT) ((INTERRUPT) & 0x3)
23#define MBOX_UAE_BIT(INTERRUPT) (((INTERRUPT) & (1<<8)))
24
25/* Mailbox response and status */
26#define MBOX_RESP_BUFFER_SIZE 16
27#define MBOX_RESP_ERR(BUFFER) ((BUFFER) & 0x00000fff)
28#define MBOX_RESP_LEN(BUFFER) (((BUFFER) & 0x007ff000) >> 12)
29#define MBOX_RESP_CLIENT_ID(BUFFER) (((BUFFER) & 0xf0000000) >> 28)
30#define MBOX_RESP_JOB_ID(BUFFER) (((BUFFER) & 0x0f000000) >> 24)
31#define MBOX_STATUS_UA_MASK (1<<8)
32
33/* Mailbox command and response */
34#define MBOX_CMD_FREE_OFFSET 0x14
35#define MBOX_CMD_BUFFER_SIZE 32
36#define MBOX_CLIENT_ID_CMD(CLIENT_ID) ((CLIENT_ID) << 28)
37#define MBOX_JOB_ID_CMD(JOB_ID) (JOB_ID<<24)
38#define MBOX_CMD_LEN_CMD(CMD_LEN) ((CMD_LEN) << 12)
39#define MBOX_INDIRECT (1 << 11)
40#define MBOX_INSUFFICIENT_BUFFER -2
41#define MBOX_CIN 0x00
42#define MBOX_ROUT 0x04
43#define MBOX_URG 0x08
44#define MBOX_INT 0x0C
45#define MBOX_COUT 0x20
46#define MBOX_RIN 0x24
47#define MBOX_STATUS 0x2C
48#define MBOX_CMD_BUFFER 0x40
49#define MBOX_RESP_BUFFER 0xC0
50
51#define MBOX_RESP_BUFFER_SIZE 16
52#define MBOX_RESP_OK 0
53#define MBOX_RESP_INVALID_CMD 1
54#define MBOX_RESP_UNKNOWN_BR 2
55#define MBOX_RESP_UNKNOWN 3
56#define MBOX_RESP_NOT_CONFIGURED 256
57
58/* Mailbox SDM doorbell */
59#define MBOX_DOORBELL_TO_SDM 0x400
60#define MBOX_DOORBELL_FROM_SDM 0x480
61
62/* Mailbox QSPI commands */
63#define MBOX_CMD_RESTART 2
64#define MBOX_CMD_QSPI_OPEN 50
65#define MBOX_CMD_QSPI_CLOSE 51
66#define MBOX_CMD_QSPI_DIRECT 59
67#define MBOX_CMD_GET_IDCODE 16
68#define MBOX_CMD_QSPI_SET_CS 52
69
Tien Hock, Loh527234a2019-10-30 14:54:25 +080070/* Mailbox CANCEL command */
71#define MBOX_CMD_CANCEL 0x3
72
Hadi Asyrafi616da772019-06-27 11:34:03 +080073/* Mailbox REBOOT commands */
74#define MBOX_CMD_REBOOT_HPS 71
75
76/* Generic error handling */
77#define MBOX_TIMEOUT -2047
78#define MBOX_NO_RESPONSE -2
79#define MBOX_WRONG_ID -3
80
81/* Mailbox status */
Hadi Asyrafi2b9198d2019-11-12 15:03:00 +080082#define RECONFIG_STATUS_STATE 0
83#define RECONFIG_STATUS_PIN_STATUS 2
84#define RECONFIG_STATUS_SOFTFUNC_STATUS 3
85#define PIN_STATUS_NSTATUS (U(1) << 31)
86#define SOFTFUNC_STATUS_SEU_ERROR (1 << 3)
87#define SOFTFUNC_STATUS_INIT_DONE (1 << 1)
88#define SOFTFUNC_STATUS_CONF_DONE (1 << 0)
89#define MBOX_CFGSTAT_STATE_IDLE 0x00000000
90#define MBOX_CFGSTAT_STATE_CONFIG 0x10000000
91#define MBOX_CFGSTAT_STATE_FAILACK 0x08000000
92#define MBOX_CFGSTAT_STATE_ERROR_INVALID 0xf0000001
93#define MBOX_CFGSTAT_STATE_ERROR_CORRUPT 0xf0000002
94#define MBOX_CFGSTAT_STATE_ERROR_AUTH 0xf0000003
95#define MBOX_CFGSTAT_STATE_ERROR_CORE_IO 0xf0000004
96#define MBOX_CFGSTAT_STATE_ERROR_HARDWARE 0xf0000005
97#define MBOX_CFGSTAT_STATE_ERROR_FAKE 0xf0000006
98#define MBOX_CFGSTAT_STATE_ERROR_BOOT_INFO 0xf0000007
99#define MBOX_CFGSTAT_STATE_ERROR_QSPI_ERROR 0xf0000008
Hadi Asyrafi616da772019-06-27 11:34:03 +0800100
Hadi Asyrafi616da772019-06-27 11:34:03 +0800101/* Mailbox reconfiguration commands */
Hadi Asyrafic5168162019-10-21 16:25:07 +0800102#define MBOX_CONFIG_STATUS 4
Hadi Asyrafi616da772019-06-27 11:34:03 +0800103#define MBOX_RECONFIG 6
104#define MBOX_RECONFIG_DATA 8
105#define MBOX_RECONFIG_STATUS 9
106
Hadi Asyrafi616da772019-06-27 11:34:03 +0800107
108void mailbox_set_int(int interrupt_input);
109int mailbox_init(void);
110void mailbox_set_qspi_close(void);
111void mailbox_set_qspi_open(void);
112void mailbox_set_qspi_direct(void);
113int mailbox_send_cmd(int job_id, unsigned int cmd, uint32_t *args,
Hadi Asyrafi9dfc0472019-11-12 16:39:46 +0800114 int len, int urgent, uint32_t *response, int resp_len);
Tien Hock, Loh527234a2019-10-30 14:54:25 +0800115int mailbox_send_cmd_async(int job_id, unsigned int cmd, uint32_t *args,
Hadi Asyrafi616da772019-06-27 11:34:03 +0800116 int len, int urgent);
Hadi Asyrafi9dfc0472019-11-12 16:39:46 +0800117int mailbox_read_response(int job_id, uint32_t *response, int resp_len);
Hadi Asyrafi616da772019-06-27 11:34:03 +0800118int mailbox_get_qspi_clock(void);
119void mailbox_reset_cold(void);
Tien Hock, Loh527234a2019-10-30 14:54:25 +0800120void mailbox_clear_response(void);
121
Hadi Asyrafic5168162019-10-21 16:25:07 +0800122uint32_t intel_mailbox_get_config_status(uint32_t cmd);
Hadi Asyrafi6aeb55d2019-12-24 14:43:22 +0800123int intel_mailbox_is_fpga_not_ready(void);
Hadi Asyrafi616da772019-06-27 11:34:03 +0800124
Hadi Asyrafi6f8a2b22019-10-23 18:34:14 +0800125#endif /* SOCFPGA_MBOX_H */