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Bryan O'Donoghue4b576102018-07-11 16:35:17 +01001/*
2 * Copyright (c) 2018, ARM Limited and Contributors. All rights reserved.
3 *
4 * SPDX-License-Identifier: BSD-3-Clause
5 */
6
Antonio Nino Diaz5eb88372018-11-08 10:20:19 +00007#ifndef IMX_CAAM_H
8#define IMX_CAAM_H
Bryan O'Donoghue4b576102018-07-11 16:35:17 +01009
10#include <stdint.h>
11#include <arch.h>
12#include <imx_regs.h>
13
14struct caam_job_ring {
15 uint32_t jrmidr_ms;
16 uint32_t jrmidr_ls;
17};
18
19struct caam_rtic_mid {
20 uint32_t rticmidr_ms;
21 uint32_t rticmidr_ls;
22};
23
24struct caam_deco {
25 uint32_t deco_mid_ms;
26 uint32_t deco_mid_ls;
27};
28
29#define JOB_RING_OFFSET 0x10
30#define DEBUGCTL_OFFSET 0x58
31#define RES2_SIZE (DEBUGCTL_OFFSET - JOB_RING_OFFSET - \
32 (sizeof(struct caam_job_ring) * CAAM_NUM_JOB_RINGS))
33
34#define RTIC_MID_OFFSET 0x60
35#define DECORR_OFFSET 0x9C
36#define RES3_SIZE (DECORR_OFFSET - RTIC_MID_OFFSET - \
37 (sizeof(struct caam_rtic_mid) * CAAM_NUM_RTIC))
38
39#define DECO_MID_OFFSET 0xA0
40#define DAR_OFFSET 0x120
41#define RES4_SIZE (DAR_OFFSET - DECO_MID_OFFSET - \
42 (sizeof(struct caam_deco) * CAAM_NUM_DECO))
43
44struct caam_ctrl {
45 uint32_t res0;
46 uint32_t mcfgr;
47 uint32_t res1;
48 uint32_t scfgr;
49 struct caam_job_ring jr[CAAM_NUM_JOB_RINGS];
50 uint8_t res2[RES2_SIZE];
51 uint32_t debuctl;
52 uint32_t jrstartr;
53 struct caam_rtic_mid mid[CAAM_NUM_RTIC];
54 uint8_t res3[RES3_SIZE];
55 uint32_t decorr;
56 struct caam_deco deco[CAAM_NUM_DECO];
57 uint8_t res4[RES4_SIZE];
58 uint32_t dar;
59 uint32_t drr;
60} __packed;
61
62/* Job ring control bits */
63#define JROWN_NS BIT(3)
64#define JROWN_MID 0x01
65
66/* Declare CAAM API */
67void imx_caam_init(void);
68
Antonio Nino Diaz5eb88372018-11-08 10:20:19 +000069#endif /* IMX_CAAM_H */