blob: 4ff91bda70c8aea6976bdc9cc0b0a85ad315ac9e [file] [log] [blame]
Anson Huang5aba17f2018-06-05 16:11:24 +08001/*
2 * Copyright (c) 2015-2018, ARM Limited and Contributors. All rights reserved.
3 *
4 * SPDX-License-Identifier: BSD-3-Clause
5 */
6
7#ifndef __IMX_LPUART_H__
8#define __IMX_LPUART_H__
9
10#include <console.h>
11
12#define VERID 0x0
13#define PARAM 0x4
14#define GLOBAL 0x8
15#define PINCFG 0xC
16#define BAUD 0x10
17#define STAT 0x14
18#define CTRL 0x18
19#define DATA 0x1C
20#define MATCH 0x20
21#define MODIR 0x24
22#define FIFO 0x28
23#define WATER 0x2c
24
25#define US1_TDRE (1 << 23)
26#define US1_RDRF (1 << 21)
27
28#define CTRL_TE (1 << 19)
29#define CTRL_RE (1 << 18)
30
31#define FIFO_TXFE 0x80
32#define FIFO_RXFE 0x40
33
34#define WATER_TXWATER_OFF 1
35#define WATER_RXWATER_OFF 16
36
37#define LPUART_CTRL_PT_MASK 0x1
38#define LPUART_CTRL_PE_MASK 0x2
39#define LPUART_CTRL_M_MASK 0x10
40
41#define LPUART_BAUD_OSR_MASK (0x1F000000U)
42#define LPUART_BAUD_OSR_SHIFT (24U)
43#define LPUART_BAUD_OSR(x) (((uint32_t)(((uint32_t)(x)) << LPUART_BAUD_OSR_SHIFT)) & LPUART_BAUD_OSR_MASK)
44
45#define LPUART_BAUD_SBR_MASK (0x1FFFU)
46#define LPUART_BAUD_SBR_SHIFT (0U)
47#define LPUART_BAUD_SBR(x) (((uint32_t)(((uint32_t)(x)) << LPUART_BAUD_SBR_SHIFT)) & LPUART_BAUD_SBR_MASK)
48
49#define LPUART_BAUD_SBNS_MASK (0x2000U)
50#define LPUART_BAUD_BOTHEDGE_MASK (0x20000U)
51#define LPUART_BAUD_M10_MASK (0x20000000U)
52
53#ifndef __ASSEMBLY__
54
55#include <types.h>
56
57typedef struct {
58 console_t console;
59 uintptr_t base;
60} console_lpuart_t;
61
62int console_lpuart_register(uintptr_t baseaddr, uint32_t clock, uint32_t baud,
63 console_lpuart_t *console);
64#endif /*__ASSEMBLY__*/
65
66#endif /* __IMX_LPUART_H__*/